Paul J Killos
Examiner (ID: 14937)
Most Active Art Unit | 1206 |
Art Unit(s) | 1623, 1621, 1625, 1204, 1206 |
Total Applications | 2978 |
Issued Applications | 2595 |
Pending Applications | 134 |
Abandoned Applications | 247 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4197650
[patent_doc_number] => 06043547
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-28
[patent_title] => 'Circuit structure with an anti-reflective layer'
[patent_app_type] => 1
[patent_app_number] => 8/870896
[patent_app_country] => US
[patent_app_date] => 1997-06-06
[patent_effective_date] => 0000-00-00
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/043/06043547.pdf
[firstpage_image] =>[orig_patent_app_number] => 870896
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/870896 | Circuit structure with an anti-reflective layer | Jun 5, 1997 | Issued |
Array
(
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[patent_doc_number] => 06294805
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-25
[patent_title] => 'Ferroelectric memory devices including capacitors located outside the active area and made with diffusion barrier layers'
[patent_app_type] => 1
[patent_app_number] => 8/869704
[patent_app_country] => US
[patent_app_date] => 1997-06-05
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[pdf_file] => patents/06/294/06294805.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/869704 | Ferroelectric memory devices including capacitors located outside the active area and made with diffusion barrier layers | Jun 4, 1997 | Issued |
Array
(
[id] => 4224982
[patent_doc_number] => 06040629
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-21
[patent_title] => 'Semiconductor integrated circuit having silicided elements of short length'
[patent_app_type] => 1
[patent_app_number] => 8/868738
[patent_app_country] => US
[patent_app_date] => 1997-06-04
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[pdf_file] => patents/06/040/06040629.pdf
[firstpage_image] =>[orig_patent_app_number] => 868738
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/868738 | Semiconductor integrated circuit having silicided elements of short length | Jun 3, 1997 | Issued |
Array
(
[id] => 4019896
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'C49-structured tungsten-containing titanium salicide structure'
[patent_app_type] => 1
[patent_app_number] => 8/862960
[patent_app_country] => US
[patent_app_date] => 1997-06-02
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 862960
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/862960 | C49-structured tungsten-containing titanium salicide structure | Jun 1, 1997 | Issued |
Array
(
[id] => 3864657
[patent_doc_number] => 05793078
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[patent_kind] => NA
[patent_issue_date] => 1998-08-11
[patent_title] => 'Non-volatile semiconductor memory device and method of fabricating thereof'
[patent_app_type] => 1
[patent_app_number] => 8/859775
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[pdf_file] => patents/05/793/05793078.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/859775 | Non-volatile semiconductor memory device and method of fabricating thereof | May 20, 1997 | Issued |
Array
(
[id] => 4002583
[patent_doc_number] => 05986301
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[patent_issue_date] => 1999-11-16
[patent_title] => 'Thin film capacitor with electrodes having a perovskite structure and a metallic conductivity'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/858768 | Thin film capacitor with electrodes having a perovskite structure and a metallic conductivity | May 18, 1997 | Issued |
Array
(
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[patent_doc_number] => 06489632
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[patent_title] => 'Semiconductor device having a gate oxide film'
[patent_app_type] => B1
[patent_app_number] => 08/855143
[patent_app_country] => US
[patent_app_date] => 1997-05-13
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[pdf_file] => patents/06/489/06489632.pdf
[firstpage_image] =>[orig_patent_app_number] => 08855143
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/855143 | Semiconductor device having a gate oxide film | May 12, 1997 | Issued |
Array
(
[id] => 3953296
[patent_doc_number] => 05977560
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[patent_kind] => NA
[patent_issue_date] => 1999-11-02
[patent_title] => 'Thin film transistor constructions with polycrystalline silicon-germanium alloy doped with carbon in the channel region'
[patent_app_type] => 1
[patent_app_number] => 8/854186
[patent_app_country] => US
[patent_app_date] => 1997-05-09
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[pdf_file] => patents/05/977/05977560.pdf
[firstpage_image] =>[orig_patent_app_number] => 854186
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/854186 | Thin film transistor constructions with polycrystalline silicon-germanium alloy doped with carbon in the channel region | May 8, 1997 | Issued |
Array
(
[id] => 4355447
[patent_doc_number] => 06215166
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[patent_issue_date] => 2001-04-10
[patent_title] => 'Radio frequency electronic device and method for regulating an amount of power delivered to a radio frequency electronic device'
[patent_app_type] => 1
[patent_app_number] => 8/848334
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/848334 | Radio frequency electronic device and method for regulating an amount of power delivered to a radio frequency electronic device | Apr 29, 1997 | Issued |
Array
(
[id] => 4388284
[patent_doc_number] => 06278174
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[patent_kind] => NA
[patent_issue_date] => 2001-08-21
[patent_title] => 'Integrated circuit insulator and structure using low dielectric insulator material including HSQ and fluorinated oxide'
[patent_app_type] => 1
[patent_app_number] => 8/845340
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[patent_app_date] => 1997-04-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/845340 | Integrated circuit insulator and structure using low dielectric insulator material including HSQ and fluorinated oxide | Apr 24, 1997 | Issued |
Array
(
[id] => 7026607
[patent_doc_number] => 20010013612
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-16
[patent_title] => 'MEMORY INTEGRATED CIRCUITRY COMPRISING LOCOS AND METHODS OF FORMING INTEGRATED CIRCUITRY'
[patent_app_type] => new
[patent_app_number] => 08/842230
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 08842230
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/842230 | Methods of forming integrated circuitry, and methods of forming dynamic random access memory circuitry | Apr 21, 1997 | Issued |
Array
(
[id] => 3882595
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[patent_title] => 'Vertical channel masked ROM memory cell with epitaxy'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/827633 | Vertical channel masked ROM memory cell with epitaxy | Apr 9, 1997 | Issued |
Array
(
[id] => 1461534
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[patent_title] => 'Electronic circuit element of conductor/insulator stacked type using high machinability substrate and benzocyclobutene as insulator'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/826094 | Electronic circuit element of conductor/insulator stacked type using high machinability substrate and benzocyclobutene as insulator | Mar 27, 1997 | Issued |
Array
(
[id] => 3944347
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[patent_title] => 'Read-only-memory cell arrangement using vertical MOS transistors and gate dielectrics of different thicknesses and method for its production'
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Array
(
[id] => 4319964
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/815814 | Heat dissipating device package | Mar 11, 1997 | Issued |
Array
(
[id] => 3944289
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[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'SRAM having P-channel TFT as load element with less series-connected high resistance'
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Array
(
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Array
(
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Array
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Array
(
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[patent_title] => 'Multilevel leadframe for a packaged integrated circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/807418 | Multilevel leadframe for a packaged integrated circuit | Feb 27, 1997 | Issued |