Search

Paul J Killos

Examiner (ID: 14937)

Most Active Art Unit
1206
Art Unit(s)
1623, 1621, 1625, 1204, 1206
Total Applications
2978
Issued Applications
2595
Pending Applications
134
Abandoned Applications
247

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4009990 [patent_doc_number] => 05859452 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Memory cell array having improved channel characteristics' [patent_app_type] => 1 [patent_app_number] => 8/807288 [patent_app_country] => US [patent_app_date] => 1997-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2268 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/859/05859452.pdf [firstpage_image] =>[orig_patent_app_number] => 807288 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/807288
Memory cell array having improved channel characteristics Feb 26, 1997 Issued
Array ( [id] => 4385266 [patent_doc_number] => 06303948 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Pad layout and lead layout in semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/805604 [patent_app_country] => US [patent_app_date] => 1997-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 10663 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303948.pdf [firstpage_image] =>[orig_patent_app_number] => 805604 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/805604
Pad layout and lead layout in semiconductor device Feb 25, 1997 Issued
Array ( [id] => 1516211 [patent_doc_number] => 06420775 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Compound semiconductor device having an ion implanted defect-rich layer for improved backgate effect suppression' [patent_app_type] => B1 [patent_app_number] => 08/806985 [patent_app_country] => US [patent_app_date] => 1997-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4445 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/420/06420775.pdf [firstpage_image] =>[orig_patent_app_number] => 08806985 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/806985
Compound semiconductor device having an ion implanted defect-rich layer for improved backgate effect suppression Feb 25, 1997 Issued
Array ( [id] => 3950714 [patent_doc_number] => 05990562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Semiconductor devices having backside probing capability' [patent_app_type] => 1 [patent_app_number] => 8/806570 [patent_app_country] => US [patent_app_date] => 1997-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2154 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/990/05990562.pdf [firstpage_image] =>[orig_patent_app_number] => 806570 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/806570
Semiconductor devices having backside probing capability Feb 24, 1997 Issued
Array ( [id] => 4136830 [patent_doc_number] => 06034391 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Semiconductor device including capacitance element having high area efficiency' [patent_app_type] => 1 [patent_app_number] => 8/805016 [patent_app_country] => US [patent_app_date] => 1997-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 97 [patent_no_of_words] => 40750 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034391.pdf [firstpage_image] =>[orig_patent_app_number] => 805016 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/805016
Semiconductor device including capacitance element having high area efficiency Feb 20, 1997 Issued
Array ( [id] => 3745480 [patent_doc_number] => 05753967 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Damascene process for reduced feature size' [patent_app_type] => 1 [patent_app_number] => 8/800148 [patent_app_country] => US [patent_app_date] => 1997-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4657 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/753/05753967.pdf [firstpage_image] =>[orig_patent_app_number] => 800148 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/800148
Damascene process for reduced feature size Feb 12, 1997 Issued
Array ( [id] => 3775884 [patent_doc_number] => 05773860 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Semiconductor device including MOS capacitance' [patent_app_type] => 1 [patent_app_number] => 8/795216 [patent_app_country] => US [patent_app_date] => 1997-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 29 [patent_no_of_words] => 2973 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/773/05773860.pdf [firstpage_image] =>[orig_patent_app_number] => 795216 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/795216
Semiconductor device including MOS capacitance Feb 4, 1997 Issued
Array ( [id] => 3788439 [patent_doc_number] => 05821591 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'High density read only memory cell configuration and method for its production' [patent_app_type] => 1 [patent_app_number] => 8/794566 [patent_app_country] => US [patent_app_date] => 1997-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5877 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821591.pdf [firstpage_image] =>[orig_patent_app_number] => 794566 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/794566
High density read only memory cell configuration and method for its production Feb 2, 1997 Issued
Array ( [id] => 3949929 [patent_doc_number] => 05990509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => '2F-square memory cell for gigabit memory applications' [patent_app_type] => 1 [patent_app_number] => 8/787418 [patent_app_country] => US [patent_app_date] => 1997-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 72 [patent_no_of_words] => 20207 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/990/05990509.pdf [firstpage_image] =>[orig_patent_app_number] => 787418 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/787418
2F-square memory cell for gigabit memory applications Jan 21, 1997 Issued
Array ( [id] => 4136795 [patent_doc_number] => 06034389 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array' [patent_app_type] => 1 [patent_app_number] => 8/792952 [patent_app_country] => US [patent_app_date] => 1997-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 72 [patent_no_of_words] => 20182 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034389.pdf [firstpage_image] =>[orig_patent_app_number] => 792952 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/792952
Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array Jan 21, 1997 Issued
Array ( [id] => 4364541 [patent_doc_number] => 06191459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Electrically programmable memory cell array, using charge carrier traps and insulation trenches' [patent_app_type] => 1 [patent_app_number] => 8/780488 [patent_app_country] => US [patent_app_date] => 1997-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5124 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/191/06191459.pdf [firstpage_image] =>[orig_patent_app_number] => 780488 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/780488
Electrically programmable memory cell array, using charge carrier traps and insulation trenches Jan 7, 1997 Issued
Array ( [id] => 3961479 [patent_doc_number] => 05936311 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Integrated circuit alignment marks distributed throughout a surface metal line' [patent_app_type] => 1 [patent_app_number] => 8/777602 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936311.pdf [firstpage_image] =>[orig_patent_app_number] => 777602 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/777602
Integrated circuit alignment marks distributed throughout a surface metal line Dec 30, 1996 Issued
Array ( [id] => 3950237 [patent_doc_number] => 05990529 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Semiconductor memory device with impurity areas around trench structure' [patent_app_type] => 1 [patent_app_number] => 8/773510 [patent_app_country] => US [patent_app_date] => 1996-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 1628 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/990/05990529.pdf [firstpage_image] =>[orig_patent_app_number] => 773510 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/773510
Semiconductor memory device with impurity areas around trench structure Dec 22, 1996 Issued
08/773256 SEMICONDUCTOR DEVICE OF A MULTI-LAYER INTERCONNECTION STRUCTURE Dec 22, 1996 Abandoned
Array ( [id] => 4190705 [patent_doc_number] => 06160305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Beta dependent temperature sensor for an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/777924 [patent_app_country] => US [patent_app_date] => 1996-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3478 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160305.pdf [firstpage_image] =>[orig_patent_app_number] => 777924 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/777924
Beta dependent temperature sensor for an integrated circuit Dec 22, 1996 Issued
Array ( [id] => 4140531 [patent_doc_number] => 06015989 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Semiconductor device having a capacitor electrode formed of iridum or ruthenium and a quantity of oxygen' [patent_app_type] => 1 [patent_app_number] => 8/770510 [patent_app_country] => US [patent_app_date] => 1996-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 10324 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/015/06015989.pdf [firstpage_image] =>[orig_patent_app_number] => 770510 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/770510
Semiconductor device having a capacitor electrode formed of iridum or ruthenium and a quantity of oxygen Dec 19, 1996 Issued
Array ( [id] => 4038649 [patent_doc_number] => 05942786 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Variable work function transistor high density mask ROM' [patent_app_type] => 1 [patent_app_number] => 8/767824 [patent_app_country] => US [patent_app_date] => 1996-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 5808 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/942/05942786.pdf [firstpage_image] =>[orig_patent_app_number] => 767824 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/767824
Variable work function transistor high density mask ROM Dec 16, 1996 Issued
Array ( [id] => 3865675 [patent_doc_number] => 05796138 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Semiconductor memory device having a tree type capacitor' [patent_app_type] => 1 [patent_app_number] => 8/757670 [patent_app_country] => US [patent_app_date] => 1996-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 33 [patent_no_of_words] => 8381 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796138.pdf [firstpage_image] =>[orig_patent_app_number] => 757670 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/757670
Semiconductor memory device having a tree type capacitor Nov 28, 1996 Issued
Array ( [id] => 3736101 [patent_doc_number] => 05665981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Thin film transistors and method of promoting large crystal grain size in the formation of polycrystalline silicon alloy thin films' [patent_app_type] => 1 [patent_app_number] => 8/755152 [patent_app_country] => US [patent_app_date] => 1996-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2271 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/665/05665981.pdf [firstpage_image] =>[orig_patent_app_number] => 755152 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/755152
Thin film transistors and method of promoting large crystal grain size in the formation of polycrystalline silicon alloy thin films Nov 21, 1996 Issued
Array ( [id] => 4123073 [patent_doc_number] => 06072190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Micro contact pin structure with a piezoelectric element and probe card using the same' [patent_app_type] => 1 [patent_app_number] => 8/751851 [patent_app_country] => US [patent_app_date] => 1996-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4254 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/072/06072190.pdf [firstpage_image] =>[orig_patent_app_number] => 751851 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/751851
Micro contact pin structure with a piezoelectric element and probe card using the same Nov 17, 1996 Issued
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