
Paul N. Dickson
Supervisory Patent Examiner (ID: 8782, Phone: (571)272-7742 , Office: P/3616 )
| Most Active Art Unit | 3106 |
| Art Unit(s) | 3614, 3618, 3600, 3106, 3616, 3611, 2899 |
| Total Applications | 1181 |
| Issued Applications | 976 |
| Pending Applications | 84 |
| Abandoned Applications | 127 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20311733
[patent_doc_number] => 20250329362
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-23
[patent_title] => MEMORY DEVICE AND METHOD OF APPLYING PASS VOLTAGE
[patent_app_type] => utility
[patent_app_number] => 19/033775
[patent_app_country] => US
[patent_app_date] => 2025-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19033775
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/033775 | MEMORY DEVICE AND METHOD OF APPLYING PASS VOLTAGE | Jan 21, 2025 | Pending |
Array
(
[id] => 20021996
[patent_doc_number] => 20250160218
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-15
[patent_title] => SPIN-ORBIT TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT, AND METHOD FOR PRODUCING SPIN-ORBIT TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT
[patent_app_type] => utility
[patent_app_number] => 19/017909
[patent_app_country] => US
[patent_app_date] => 2025-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11182
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19017909
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/017909 | SPIN-ORBIT TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT, AND METHOD FOR PRODUCING SPIN-ORBIT TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT | Jan 12, 2025 | Pending |
Array
(
[id] => 20618008
[patent_doc_number] => 20260088111
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-03-26
[patent_title] => MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 19/005599
[patent_app_country] => US
[patent_app_date] => 2024-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2531
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19005599
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/005599 | MEMORY DEVICE | Dec 29, 2024 | Pending |
Array
(
[id] => 20061477
[patent_doc_number] => 20250199699
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-19
[patent_title] => MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING
[patent_app_type] => utility
[patent_app_number] => 18/976456
[patent_app_country] => US
[patent_app_date] => 2024-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18976456
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/976456 | MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING | Dec 10, 2024 | Pending |
Array
(
[id] => 20044575
[patent_doc_number] => 20250182797
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => Memory Device
[patent_app_type] => utility
[patent_app_number] => 18/973991
[patent_app_country] => US
[patent_app_date] => 2024-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16809
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18973991
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/973991 | Memory Device | Dec 8, 2024 | Pending |
Array
(
[id] => 20660375
[patent_doc_number] => 20260112426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-04-23
[patent_title] => METHOD AND SYSTEM FOR ENHANCING LIFESPAN OF A NAND FLASH MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/971427
[patent_app_country] => US
[patent_app_date] => 2024-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2419
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18971427
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/971427 | METHOD AND SYSTEM FOR ENHANCING LIFESPAN OF A NAND FLASH MEMORY | Dec 5, 2024 | Pending |
Array
(
[id] => 20283371
[patent_doc_number] => 20250308613
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => SCAN REGISTER CIRCUIT GENERATING POSITION INDEX SIGNAL THROUGH FAIL-BIT SCAN OPERATION AND MEMORY DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/967166
[patent_app_country] => US
[patent_app_date] => 2024-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7427
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18967166
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/967166 | SCAN REGISTER CIRCUIT GENERATING POSITION INDEX SIGNAL THROUGH FAIL-BIT SCAN OPERATION AND MEMORY DEVICE INCLUDING THE SAME | Dec 2, 2024 | Pending |
Array
(
[id] => 20422819
[patent_doc_number] => 20250384904
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-18
[patent_title] => MEMORY AND CONTROL METHOD
[patent_app_type] => utility
[patent_app_number] => 18/960530
[patent_app_country] => US
[patent_app_date] => 2024-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3960
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18960530
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/960530 | MEMORY AND CONTROL METHOD | Nov 25, 2024 | Pending |
Array
(
[id] => 19835490
[patent_doc_number] => 20250087276
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-13
[patent_title] => ERASE SUSPEND WITH CONFIGURABLE FORWARD PROGRESS
[patent_app_type] => utility
[patent_app_number] => 18/960340
[patent_app_country] => US
[patent_app_date] => 2024-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9102
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18960340
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/960340 | ERASE SUSPEND WITH CONFIGURABLE FORWARD PROGRESS | Nov 25, 2024 | Pending |
Array
(
[id] => 19834069
[patent_doc_number] => 20250085855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-13
[patent_title] => BEST READ REFERENCE VOLTAGE SEARCH OF 3D NAND MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/959467
[patent_app_country] => US
[patent_app_date] => 2024-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14370
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18959467
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/959467 | BEST READ REFERENCE VOLTAGE SEARCH OF 3D NAND MEMORY | Nov 24, 2024 | Pending |
Array
(
[id] => 20030152
[patent_doc_number] => 20250168374
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-22
[patent_title] => MEMORY STRUCTURE, STORAGE METHOD, ENTROPY DECODING METHOD, CHIP, DEVICE, AND STORAGE MEDIUM
[patent_app_type] => utility
[patent_app_number] => 18/948983
[patent_app_country] => US
[patent_app_date] => 2024-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11826
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18948983
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/948983 | MEMORY STRUCTURE, STORAGE METHOD, ENTROPY DECODING METHOD, CHIP, DEVICE, AND STORAGE MEDIUM | Nov 14, 2024 | Pending |
Array
(
[id] => 19788274
[patent_doc_number] => 20250061953
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-20
[patent_title] => SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/936629
[patent_app_country] => US
[patent_app_date] => 2024-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 24024
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936629
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/936629 | SEMICONDUCTOR MEMORY DEVICE | Nov 3, 2024 | Pending |
Array
(
[id] => 20053409
[patent_doc_number] => 20250191631
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-12
[patent_title] => PUMPING VOLTAGE GENERATING CIRCUIT IN WHICH THE TOTAL PUMPING FORCE IS CONTROLLED IN RESPONSE TO THE SELF-REFRESH CHARGE CONSUMPTION
[patent_app_type] => utility
[patent_app_number] => 18/933955
[patent_app_country] => US
[patent_app_date] => 2024-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5109
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18933955
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/933955 | PUMPING VOLTAGE GENERATING CIRCUIT IN WHICH THE TOTAL PUMPING FORCE IS CONTROLLED IN RESPONSE TO THE SELF-REFRESH CHARGE CONSUMPTION | Oct 30, 2024 | Pending |
Array
(
[id] => 19850404
[patent_doc_number] => 20250095755
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-20
[patent_title] => MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/932736
[patent_app_country] => US
[patent_app_date] => 2024-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15935
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18932736
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/932736 | MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY DEVICE | Oct 30, 2024 | Pending |
Array
(
[id] => 19773114
[patent_doc_number] => 20250054540
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-13
[patent_title] => LIFETIME MIXED LEVEL NON-VOLATILE MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/926560
[patent_app_country] => US
[patent_app_date] => 2024-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3796
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18926560
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/926560 | Lifetime mixed level non-volatile memory system | Oct 24, 2024 | Issued |
Array
(
[id] => 20681933
[patent_doc_number] => 20260120758
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-04-30
[patent_title] => STORAGE CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/925460
[patent_app_country] => US
[patent_app_date] => 2024-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2116
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18925460
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/925460 | STORAGE CIRCUIT | Oct 23, 2024 | Pending |
Array
(
[id] => 19757812
[patent_doc_number] => 20250046377
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => MEMORY DEVICE, MEMORY SYSTEM, AND METHOD OF OPERATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/925712
[patent_app_country] => US
[patent_app_date] => 2024-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19746
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18925712
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/925712 | MEMORY DEVICE, MEMORY SYSTEM, AND METHOD OF OPERATING THE SAME | Oct 23, 2024 | Pending |
Array
(
[id] => 19995522
[patent_doc_number] => 20250133744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-24
[patent_title] => 3D Ferroelectric Memory Structure and Method for Reading-Out the Memory Structure
[patent_app_type] => utility
[patent_app_number] => 18/920207
[patent_app_country] => US
[patent_app_date] => 2024-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1073
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18920207
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/920207 | 3D Ferroelectric Memory Structure and Method for Reading-Out the Memory Structure | Oct 17, 2024 | Pending |
Array
(
[id] => 19881236
[patent_doc_number] => 20250113493
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-03
[patent_title] => THREE-DIMENSIONAL MEMORY STRING ARRAY OF THIN-FILM FERROELECTRIC TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 18/919262
[patent_app_country] => US
[patent_app_date] => 2024-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 28525
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -36
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18919262
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/919262 | THREE-DIMENSIONAL MEMORY STRING ARRAY OF THIN-FILM FERROELECTRIC TRANSISTORS | Oct 16, 2024 | Pending |
Array
(
[id] => 19749192
[patent_doc_number] => 20250037757
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-30
[patent_title] => SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEMICONDUCTOR DIE, AND SEMICONDUCTOR DEVICES INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/914640
[patent_app_country] => US
[patent_app_date] => 2024-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12488
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18914640
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/914640 | SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEMICONDUCTOR DIE, AND SEMICONDUCTOR DEVICES INCLUDING THE SAME | Oct 13, 2024 | Pending |