Search

Pauline Vu

Examiner (ID: 13658, Phone: (571)272-5265 , Office: P/2823 )

Most Active Art Unit
2823
Art Unit(s)
2823, 2819
Total Applications
188
Issued Applications
119
Pending Applications
0
Abandoned Applications
70

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5971080 [patent_doc_number] => 20110151609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'Method for Forming Thin Film Heat Dissipater' [patent_app_type] => utility [patent_app_number] => 13/037361 [patent_app_country] => US [patent_app_date] => 2011-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3512 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20110151609.pdf [firstpage_image] =>[orig_patent_app_number] => 13037361 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/037361
Method for Forming Thin Film Heat Dissipater Feb 28, 2011 Abandoned
Array ( [id] => 8344882 [patent_doc_number] => 20120205814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'DIELECTRIC PROTECTION LAYER AS A CHEMICAL-MECHANICAL POLISHING STOP LAYER' [patent_app_type] => utility [patent_app_number] => 13/028889 [patent_app_country] => US [patent_app_date] => 2011-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6034 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13028889 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/028889
Dielectric protection layer as a chemical-mechanical polishing stop layer Feb 15, 2011 Issued
Array ( [id] => 10876151 [patent_doc_number] => 08900936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'FinFET device having reduce capacitance, access resistance, and contact resistance' [patent_app_type] => utility [patent_app_number] => 13/017966 [patent_app_country] => US [patent_app_date] => 2011-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3123 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13017966 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/017966
FinFET device having reduce capacitance, access resistance, and contact resistance Jan 30, 2011 Issued
Array ( [id] => 7570969 [patent_doc_number] => 20110266625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'Maintaining Integrity of a High-K Gate Stack After Embedding a Stressor Material by Using a Liner' [patent_app_type] => utility [patent_app_number] => 12/963253 [patent_app_country] => US [patent_app_date] => 2010-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8055 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20110266625.pdf [firstpage_image] =>[orig_patent_app_number] => 12963253 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963253
Maintaining Integrity of a High-K Gate Stack After Embedding a Stressor Material by Using a Liner Dec 7, 2010 Abandoned
Array ( [id] => 8368166 [patent_doc_number] => 20120217553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/063737 [patent_app_country] => US [patent_app_date] => 2010-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3845 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13063737 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/063737
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME Jun 27, 2010 Abandoned
Array ( [id] => 5929431 [patent_doc_number] => 20110039390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-17 [patent_title] => 'Reducing Local Mismatch of Devices Using Cryo-Implantation' [patent_app_type] => utility [patent_app_number] => 12/784348 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2497 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20110039390.pdf [firstpage_image] =>[orig_patent_app_number] => 12784348 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/784348
Reducing Local Mismatch of Devices Using Cryo-Implantation May 19, 2010 Abandoned
Array ( [id] => 6398741 [patent_doc_number] => 20100178752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'SEMICONDUCTOR DEVICE AND FUSE BLOWOUT METHOD' [patent_app_type] => utility [patent_app_number] => 12/730934 [patent_app_country] => US [patent_app_date] => 2010-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7703 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20100178752.pdf [firstpage_image] =>[orig_patent_app_number] => 12730934 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/730934
SEMICONDUCTOR DEVICE AND FUSE BLOWOUT METHOD Mar 23, 2010 Abandoned
Array ( [id] => 6230014 [patent_doc_number] => 20100263720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'PHOTOVOLTAIC DEVICE' [patent_app_type] => utility [patent_app_number] => 12/638674 [patent_app_country] => US [patent_app_date] => 2009-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4727 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20100263720.pdf [firstpage_image] =>[orig_patent_app_number] => 12638674 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/638674
Photovoltaic device Dec 14, 2009 Issued
Array ( [id] => 4756649 [patent_doc_number] => 20080308874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'Complementary Asymmetric High Voltage Devices and Method of Fabrication' [patent_app_type] => utility [patent_app_number] => 11/910613 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3124 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0308/20080308874.pdf [firstpage_image] =>[orig_patent_app_number] => 11910613 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/910613
Complementary Asymmetric High Voltage Devices and Method of Fabrication Mar 29, 2006 Abandoned
Menu