Search

Peniel M. Gumedzoe

Examiner (ID: 6862, Phone: (571)270-3041 , Office: P/2899 )

Most Active Art Unit
2899
Art Unit(s)
2899, 2891
Total Applications
1620
Issued Applications
1323
Pending Applications
84
Abandoned Applications
248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20503465 [patent_doc_number] => 20260032930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => 3D IC STRUCTURE [patent_app_type] => utility [patent_app_number] => 19/342027 [patent_app_country] => US [patent_app_date] => 2025-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19342027 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/342027
3D IC STRUCTURE Sep 25, 2025 Pending
Array ( [id] => 20490189 [patent_doc_number] => 20260026392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => 3D IC STRUCTURE [patent_app_type] => utility [patent_app_number] => 19/342105 [patent_app_country] => US [patent_app_date] => 2025-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19342105 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/342105
3D IC STRUCTURE Sep 25, 2025 Pending
Array ( [id] => 20792697 [patent_doc_number] => 12666629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => 3D IC structure [patent_app_type] => utility [patent_app_number] => 19/280988 [patent_app_country] => US [patent_app_date] => 2025-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 27 [patent_no_of_words] => 7616 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19280988 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/280988
3D IC structure Jul 24, 2025 Issued
Array ( [id] => 20367585 [patent_doc_number] => 20250357397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => 3D IC STRUCTURE [patent_app_type] => utility [patent_app_number] => 19/281045 [patent_app_country] => US [patent_app_date] => 2025-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19281045 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/281045
3D IC STRUCTURE Jul 24, 2025 Pending
Array ( [id] => 20324678 [patent_doc_number] => 20250336766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => OPTIMIZATION OF THE THERMAL PERFORMANCE OF THE 3D ICS UTILIZING THE INTEGRATED CHIP-SIZE DOUBLE-LAYER OR MULTI-LAYER MICROCHANNELS [patent_app_type] => utility [patent_app_number] => 19/177495 [patent_app_country] => US [patent_app_date] => 2025-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19177495 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/177495
OPTIMIZATION OF THE THERMAL PERFORMANCE OF THE 3D ICS UTILIZING THE INTEGRATED CHIP-SIZE DOUBLE-LAYER OR MULTI-LAYER MICROCHANNELS Apr 10, 2025 Pending
Array ( [id] => 21014787 [patent_doc_number] => 12751289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-29 [patent_title] => Semiconductor package and semiconductor package assembly with edge interconnection and method of forming the same [patent_app_type] => utility [patent_app_number] => 19/059275 [patent_app_country] => US [patent_app_date] => 2025-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 97 [patent_no_of_words] => 28388 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19059275 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/059275
SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE ASSEMBLY WITH EDGE INTERCONNECTION AND METHOD OF FORMING THE SAME Feb 20, 2025 Pending
Array ( [id] => 19972454 [patent_doc_number] => 12341075 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-24 [patent_title] => Systems and methods for cooling electronic circuits [patent_app_type] => utility [patent_app_number] => 18/967029 [patent_app_country] => US [patent_app_date] => 2024-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 6799 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18967029 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/967029
Systems and methods for cooling electronic circuits Dec 2, 2024 Issued
Array ( [id] => 20684112 [patent_doc_number] => 20260122948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => HIGH-ELECTRON-MOBILITY TRANSISTORS WITH ACTIVE BLOCKS [patent_app_type] => utility [patent_app_number] => 18/912129 [patent_app_country] => US [patent_app_date] => 2024-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18912129 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/912129
HIGH-ELECTRON-MOBILITY TRANSISTORS WITH ACTIVE BLOCKS Oct 9, 2024 Issued
Array ( [id] => 19936827 [patent_doc_number] => 12310047 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-05-20 [patent_title] => Laterally-diffused metal-oxide-semiconductor devices with a field plate [patent_app_type] => utility [patent_app_number] => 18/907770 [patent_app_country] => US [patent_app_date] => 2024-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18907770 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/907770
Laterally-diffused metal-oxide-semiconductor devices with a field plate Oct 6, 2024 Issued
Array ( [id] => 19672674 [patent_doc_number] => 12185469 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-12-31 [patent_title] => Lead frame and method for stacking discrete components to be embedded in semiconductor device [patent_app_type] => utility [patent_app_number] => 18/821747 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821747
Lead frame and method for stacking discrete components to be embedded in semiconductor device Aug 29, 2024 Issued
Array ( [id] => 19835770 [patent_doc_number] => 20250087556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => OPTIMIZATION OF THE THERMAL PERFORMANCE OF THE 3D ICS UTILIZING THE INTEGRATED CHIP-SIZE DOUBLE-LAYER OR MULTI-LAYER MICROCHANNELS [patent_app_type] => utility [patent_app_number] => 18/793277 [patent_app_country] => US [patent_app_date] => 2024-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18793277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/793277
Optimization of the thermal performance of the 3D ICs utilizing the integrated chip-size double-layer or multi-layer microchannels Aug 1, 2024 Issued
Array ( [id] => 19720404 [patent_doc_number] => 12205949 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-21 [patent_title] => High-voltage semiconductor device structures [patent_app_type] => utility [patent_app_number] => 18/758069 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/758069
High-voltage semiconductor device structures Jun 27, 2024 Issued
Array ( [id] => 20448484 [patent_doc_number] => 20260005210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => PACKAGE COMPRISING A PACKAGE INTERPOSER AND A LID FRAME WITH AN OPENING [patent_app_type] => utility [patent_app_number] => 18/758938 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758938 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/758938
PACKAGE COMPRISING A PACKAGE INTERPOSER AND A LID FRAME WITH AN OPENING Jun 27, 2024 Pending
Array ( [id] => 19727131 [patent_doc_number] => 20250029882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/754897 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18754897 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/754897
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Jun 25, 2024 Pending
Array ( [id] => 19500499 [patent_doc_number] => 20240339517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/749503 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749503 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749503
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Jun 19, 2024 Pending
Array ( [id] => 20096302 [patent_doc_number] => 20250226238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/861583 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18861583 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/861583
Method for manufacturing semiconductor device and semiconductor device May 28, 2024 Issued
Array ( [id] => 19868281 [patent_doc_number] => 20250107067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/676726 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18676726 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/676726
MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME May 28, 2024 Pending
Array ( [id] => 19452800 [patent_doc_number] => 20240312930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/673328 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673328 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/673328
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME May 23, 2024 Pending
Array ( [id] => 19452721 [patent_doc_number] => 20240312851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 18/671330 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671330 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671330
SEMICONDUCTOR PACKAGE AND METHOD FOR MAKING THE SAME May 21, 2024 Pending
Array ( [id] => 19437961 [patent_doc_number] => 20240306459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/666820 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666820 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/666820
DISPLAY APPARATUS May 16, 2024 Pending
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