Search

Percy W. Echols

Examiner (ID: 18977)

Most Active Art Unit
3206
Art Unit(s)
3201, 3726, 3727, 3206, 2899
Total Applications
1610
Issued Applications
1447
Pending Applications
45
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 946999 [patent_doc_number] => 06965333 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-15 [patent_title] => 'Circuit for using capacitor voltage divider in a delta-sigma digital-to-analog converter to generate reference voltage' [patent_app_type] => utility [patent_app_number] => 11/103546 [patent_app_country] => US [patent_app_date] => 2005-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1455 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/965/06965333.pdf [firstpage_image] =>[orig_patent_app_number] => 11103546 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/103546
Circuit for using capacitor voltage divider in a delta-sigma digital-to-analog converter to generate reference voltage Apr 11, 2005 Issued
Array ( [id] => 700978 [patent_doc_number] => 07068194 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-27 [patent_title] => 'High-density MOS-decoded unary DAC' [patent_app_type] => utility [patent_app_number] => 11/085909 [patent_app_country] => US [patent_app_date] => 2005-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 4464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/068/07068194.pdf [firstpage_image] =>[orig_patent_app_number] => 11085909 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/085909
High-density MOS-decoded unary DAC Mar 20, 2005 Issued
Array ( [id] => 731360 [patent_doc_number] => 07042374 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-09 [patent_title] => 'Calibration of a current source array' [patent_app_type] => utility [patent_app_number] => 11/086901 [patent_app_country] => US [patent_app_date] => 2005-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 10113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/042/07042374.pdf [firstpage_image] =>[orig_patent_app_number] => 11086901 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/086901
Calibration of a current source array Mar 20, 2005 Issued
Array ( [id] => 941729 [patent_doc_number] => 06970121 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-29 [patent_title] => 'Digital to analog converter, liquid crystal display driving circuit, method for digital to analog conversion, and LCD using the digital to analog converter' [patent_app_type] => utility [patent_app_number] => 11/085747 [patent_app_country] => US [patent_app_date] => 2005-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3400 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970121.pdf [firstpage_image] =>[orig_patent_app_number] => 11085747 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/085747
Digital to analog converter, liquid crystal display driving circuit, method for digital to analog conversion, and LCD using the digital to analog converter Mar 20, 2005 Issued
Array ( [id] => 7017069 [patent_doc_number] => 20050219087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Method for Compensating Gain Mismatch Between Two DACs and Apparatus Thereof' [patent_app_type] => utility [patent_app_number] => 10/906968 [patent_app_country] => US [patent_app_date] => 2005-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4603 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20050219087.pdf [firstpage_image] =>[orig_patent_app_number] => 10906968 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/906968
Method for compensating gain mismatch between two DACs and apparatus thereof Mar 13, 2005 Issued
Array ( [id] => 7017082 [patent_doc_number] => 20050219100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'GAIN CONTROL FOR ANALOG-DIGITAL CONVERTER' [patent_app_type] => utility [patent_app_number] => 11/072297 [patent_app_country] => US [patent_app_date] => 2005-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9150 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20050219100.pdf [firstpage_image] =>[orig_patent_app_number] => 11072297 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/072297
Gain control for analog-digital converter Mar 6, 2005 Issued
Array ( [id] => 7037329 [patent_doc_number] => 20050156763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Variable-length encoding method, variable-length decoding method, storage medium, variable-length encoding device, variable-length decoding device, and bit stream' [patent_app_type] => utility [patent_app_number] => 11/064455 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18140 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20050156763.pdf [firstpage_image] =>[orig_patent_app_number] => 11064455 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/064455
Variable-length encoding method, variable-length decoding method, storage medium, variable-length encoding device, variable-length decoding device, and bit stream Feb 23, 2005 Issued
Array ( [id] => 6981606 [patent_doc_number] => 20050151675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'METHODS AND SYSTEMS FOR SYNCHRONIZING DATA STREAMS' [patent_app_type] => utility [patent_app_number] => 11/062691 [patent_app_country] => US [patent_app_date] => 2005-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7081 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20050151675.pdf [firstpage_image] =>[orig_patent_app_number] => 11062691 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/062691
Methods and systems for synchronizing data streams Feb 21, 2005 Issued
Array ( [id] => 958028 [patent_doc_number] => 06957266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'Methods and systems for synchronizing data streams' [patent_app_type] => utility [patent_app_number] => 11/062692 [patent_app_country] => US [patent_app_date] => 2005-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7082 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/957/06957266.pdf [firstpage_image] =>[orig_patent_app_number] => 11062692 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/062692
Methods and systems for synchronizing data streams Feb 21, 2005 Issued
Array ( [id] => 7109084 [patent_doc_number] => 20050206538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Skew-tolerant gray codes' [patent_app_type] => utility [patent_app_number] => 11/062015 [patent_app_country] => US [patent_app_date] => 2005-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11406 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20050206538.pdf [firstpage_image] =>[orig_patent_app_number] => 11062015 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/062015
Skew-tolerant gray codes Feb 17, 2005 Issued
Array ( [id] => 7095651 [patent_doc_number] => 20050128109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'System, method, and apparatus for variable length decoder' [patent_app_type] => utility [patent_app_number] => 11/042221 [patent_app_country] => US [patent_app_date] => 2005-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2605 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20050128109.pdf [firstpage_image] =>[orig_patent_app_number] => 11042221 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/042221
System, method, and apparatus for variable length decoder Jan 24, 2005 Issued
Array ( [id] => 791072 [patent_doc_number] => 06985097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Error correction circuit and A/D converter' [patent_app_type] => utility [patent_app_number] => 11/041256 [patent_app_country] => US [patent_app_date] => 2005-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4409 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/985/06985097.pdf [firstpage_image] =>[orig_patent_app_number] => 11041256 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/041256
Error correction circuit and A/D converter Jan 24, 2005 Issued
Array ( [id] => 938874 [patent_doc_number] => 06972703 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-06 [patent_title] => 'Voltage detection circuit' [patent_app_type] => utility [patent_app_number] => 11/014268 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2655 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/972/06972703.pdf [firstpage_image] =>[orig_patent_app_number] => 11014268 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/014268
Voltage detection circuit Dec 15, 2004 Issued
Array ( [id] => 735528 [patent_doc_number] => 07038608 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-02 [patent_title] => 'Digital to analog converter' [patent_app_type] => utility [patent_app_number] => 11/013950 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3367 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038608.pdf [firstpage_image] =>[orig_patent_app_number] => 11013950 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/013950
Digital to analog converter Dec 15, 2004 Issued
Array ( [id] => 775340 [patent_doc_number] => 07002496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-21 [patent_title] => 'All-digital calibration of string DAC linearity using area efficient PWL approximation: eliminating hardware search and digital division' [patent_app_type] => utility [patent_app_number] => 11/007604 [patent_app_country] => US [patent_app_date] => 2004-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5245 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/002/07002496.pdf [firstpage_image] =>[orig_patent_app_number] => 11007604 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/007604
All-digital calibration of string DAC linearity using area efficient PWL approximation: eliminating hardware search and digital division Dec 7, 2004 Issued
Array ( [id] => 744097 [patent_doc_number] => 07030789 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-18 [patent_title] => 'Techniques for applying modulation constraints to data using periodically changing symbol mappings' [patent_app_type] => utility [patent_app_number] => 11/002970 [patent_app_country] => US [patent_app_date] => 2004-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6751 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/030/07030789.pdf [firstpage_image] =>[orig_patent_app_number] => 11002970 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/002970
Techniques for applying modulation constraints to data using periodically changing symbol mappings Nov 30, 2004 Issued
Array ( [id] => 740306 [patent_doc_number] => 07034724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-25 [patent_title] => 'Training circuit and method of digital-analog converter and analog-digital converter' [patent_app_type] => utility [patent_app_number] => 10/904545 [patent_app_country] => US [patent_app_date] => 2004-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3020 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/034/07034724.pdf [firstpage_image] =>[orig_patent_app_number] => 10904545 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/904545
Training circuit and method of digital-analog converter and analog-digital converter Nov 15, 2004 Issued
Array ( [id] => 722192 [patent_doc_number] => 07049996 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-23 [patent_title] => 'Method and apparatus of two stage scaling and quantization for coded communication systems' [patent_app_type] => utility [patent_app_number] => 10/987343 [patent_app_country] => US [patent_app_date] => 2004-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2582 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/049/07049996.pdf [firstpage_image] =>[orig_patent_app_number] => 10987343 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/987343
Method and apparatus of two stage scaling and quantization for coded communication systems Nov 11, 2004 Issued
Array ( [id] => 7163457 [patent_doc_number] => 20050200509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-15 [patent_title] => 'CURRENT CELL MATRIX TYPE DIGITAL-TO-ANALOG CONVERTER' [patent_app_type] => utility [patent_app_number] => 10/983644 [patent_app_country] => US [patent_app_date] => 2004-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5869 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20050200509.pdf [firstpage_image] =>[orig_patent_app_number] => 10983644 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/983644
Current cell matrix type digital-to-analog converter Nov 8, 2004 Issued
Array ( [id] => 7008917 [patent_doc_number] => 20050062633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'METHOD FOR MATCHING RISE AND FALL TIMES OF DRIVE SIGNALS IN A DIGITAL TO ANALOG CONVERTER' [patent_app_type] => utility [patent_app_number] => 10/975102 [patent_app_country] => US [patent_app_date] => 2004-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2271 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20050062633.pdf [firstpage_image] =>[orig_patent_app_number] => 10975102 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/975102
Method for matching rise and fall times of drive signals in a digital to analog converter Oct 27, 2004 Issued
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