
Percy W. Echols
Examiner (ID: 18977)
| Most Active Art Unit | 3206 |
| Art Unit(s) | 3201, 3726, 3727, 3206, 2899 |
| Total Applications | 1610 |
| Issued Applications | 1447 |
| Pending Applications | 45 |
| Abandoned Applications | 118 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 791013
[patent_doc_number] => 06985038
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-10
[patent_title] => 'Operational amplifier generating desired feedback reference voltage allowing improved output characteristic'
[patent_app_type] => utility
[patent_app_number] => 10/830450
[patent_app_country] => US
[patent_app_date] => 2004-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8103
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 282
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/985/06985038.pdf
[firstpage_image] =>[orig_patent_app_number] => 10830450
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/830450 | Operational amplifier generating desired feedback reference voltage allowing improved output characteristic | Apr 22, 2004 | Issued |
Array
(
[id] => 775087
[patent_doc_number] => 07002369
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-21
[patent_title] => 'Implementing complex clock designs in field programmable devices'
[patent_app_type] => utility
[patent_app_number] => 10/709237
[patent_app_country] => US
[patent_app_date] => 2004-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2644
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/002/07002369.pdf
[firstpage_image] =>[orig_patent_app_number] => 10709237
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/709237 | Implementing complex clock designs in field programmable devices | Apr 22, 2004 | Issued |
Array
(
[id] => 941652
[patent_doc_number] => 06970044
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-11-29
[patent_title] => 'Audio signal amplifier circuit and electronic apparatus having the same'
[patent_app_type] => utility
[patent_app_number] => 10/829206
[patent_app_country] => US
[patent_app_date] => 2004-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3961
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/970/06970044.pdf
[firstpage_image] =>[orig_patent_app_number] => 10829206
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/829206 | Audio signal amplifier circuit and electronic apparatus having the same | Apr 21, 2004 | Issued |
Array
(
[id] => 717907
[patent_doc_number] => 07053802
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-30
[patent_title] => 'Single-ended balance-coded interface with embedded-timing'
[patent_app_type] => utility
[patent_app_number] => 10/830505
[patent_app_country] => US
[patent_app_date] => 2004-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 5493
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/053/07053802.pdf
[firstpage_image] =>[orig_patent_app_number] => 10830505
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/830505 | Single-ended balance-coded interface with embedded-timing | Apr 21, 2004 | Issued |
Array
(
[id] => 791014
[patent_doc_number] => 06985039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-10
[patent_title] => 'Method and apparatus for providing a stable power output of power amplifiers, operating under unstable supply voltage conditions'
[patent_app_type] => utility
[patent_app_number] => 10/829857
[patent_app_country] => US
[patent_app_date] => 2004-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3359
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/985/06985039.pdf
[firstpage_image] =>[orig_patent_app_number] => 10829857
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/829857 | Method and apparatus for providing a stable power output of power amplifiers, operating under unstable supply voltage conditions | Apr 20, 2004 | Issued |
Array
(
[id] => 973204
[patent_doc_number] => 06937175
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-08-30
[patent_title] => 'Amplifier linearization using delta-sigma predistortion'
[patent_app_type] => utility
[patent_app_number] => 10/830736
[patent_app_country] => US
[patent_app_date] => 2004-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 5416
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/937/06937175.pdf
[firstpage_image] =>[orig_patent_app_number] => 10830736
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/830736 | Amplifier linearization using delta-sigma predistortion | Apr 20, 2004 | Issued |
Array
(
[id] => 1057377
[patent_doc_number] => 06856264
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-02-15
[patent_title] => 'Method for decoding reversible variable length code using leading-zeros variable length decoding techniques'
[patent_app_type] => utility
[patent_app_number] => 10/826946
[patent_app_country] => US
[patent_app_date] => 2004-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 6742
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/856/06856264.pdf
[firstpage_image] =>[orig_patent_app_number] => 10826946
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/826946 | Method for decoding reversible variable length code using leading-zeros variable length decoding techniques | Apr 15, 2004 | Issued |
Array
(
[id] => 1098378
[patent_doc_number] => 06822588
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-11-23
[patent_title] => 'Pulse width modulation systems and methods'
[patent_app_type] => B1
[patent_app_number] => 10/825577
[patent_app_country] => US
[patent_app_date] => 2004-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3182
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/822/06822588.pdf
[firstpage_image] =>[orig_patent_app_number] => 10825577
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/825577 | Pulse width modulation systems and methods | Apr 14, 2004 | Issued |
Array
(
[id] => 6950371
[patent_doc_number] => 20050225465
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Current-steering digital-to-analog converter having a minimum charge injection latch'
[patent_app_type] => utility
[patent_app_number] => 10/823046
[patent_app_country] => US
[patent_app_date] => 2004-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3342
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0225/20050225465.pdf
[firstpage_image] =>[orig_patent_app_number] => 10823046
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/823046 | Current-steering digital-to-analog converter having a minimum charge injection latch | Apr 12, 2004 | Issued |
Array
(
[id] => 6950373
[patent_doc_number] => 20050225467
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'METHOD AND SYSTEM FOR ANALOG TO DIGITAL CONVERSION USING DIGITAL PULSE WIDTH MODULATION (PWM)'
[patent_app_type] => utility
[patent_app_number] => 10/819644
[patent_app_country] => US
[patent_app_date] => 2004-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5818
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0225/20050225467.pdf
[firstpage_image] =>[orig_patent_app_number] => 10819644
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/819644 | Method and system for analog to digital conversion using digital pulse width modulation (PWM) | Apr 6, 2004 | Issued |
Array
(
[id] => 1066948
[patent_doc_number] => 06847320
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-01-25
[patent_title] => 'ADC linearity improvement'
[patent_app_type] => utility
[patent_app_number] => 10/816235
[patent_app_country] => US
[patent_app_date] => 2004-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2923
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/847/06847320.pdf
[firstpage_image] =>[orig_patent_app_number] => 10816235
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/816235 | ADC linearity improvement | Mar 29, 2004 | Issued |
Array
(
[id] => 1098409
[patent_doc_number] => 06822600
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-11-23
[patent_title] => 'Amplifier array termination'
[patent_app_type] => B1
[patent_app_number] => 10/816293
[patent_app_country] => US
[patent_app_date] => 2004-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2918
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/822/06822600.pdf
[firstpage_image] =>[orig_patent_app_number] => 10816293
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/816293 | Amplifier array termination | Mar 29, 2004 | Issued |
Array
(
[id] => 726748
[patent_doc_number] => 07046178
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-16
[patent_title] => 'Method and device for the calibration of a weighted network'
[patent_app_type] => utility
[patent_app_number] => 10/810050
[patent_app_country] => US
[patent_app_date] => 2004-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 4896
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/046/07046178.pdf
[firstpage_image] =>[orig_patent_app_number] => 10810050
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/810050 | Method and device for the calibration of a weighted network | Mar 25, 2004 | Issued |
Array
(
[id] => 961459
[patent_doc_number] => 06952172
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-10-04
[patent_title] => 'All-optical linear feedback shift register'
[patent_app_type] => utility
[patent_app_number] => 10/804321
[patent_app_country] => US
[patent_app_date] => 2004-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9109
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/952/06952172.pdf
[firstpage_image] =>[orig_patent_app_number] => 10804321
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/804321 | All-optical linear feedback shift register | Mar 18, 2004 | Issued |
Array
(
[id] => 956762
[patent_doc_number] => 06956516
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-10-18
[patent_title] => 'A/D conversion circuit, temperature-sensor circuit, integrated circuit, and method of adjusting the temperature-sensor circuit'
[patent_app_type] => utility
[patent_app_number] => 10/793646
[patent_app_country] => US
[patent_app_date] => 2004-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 25
[patent_no_of_words] => 10972
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/956/06956516.pdf
[firstpage_image] =>[orig_patent_app_number] => 10793646
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/793646 | A/D conversion circuit, temperature-sensor circuit, integrated circuit, and method of adjusting the temperature-sensor circuit | Mar 3, 2004 | Issued |
Array
(
[id] => 1015520
[patent_doc_number] => 06894629
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-05-17
[patent_title] => 'Resolver/digital converter'
[patent_app_type] => utility
[patent_app_number] => 10/792650
[patent_app_country] => US
[patent_app_date] => 2004-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4039
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/894/06894629.pdf
[firstpage_image] =>[orig_patent_app_number] => 10792650
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/792650 | Resolver/digital converter | Mar 3, 2004 | Issued |
Array
(
[id] => 1019272
[patent_doc_number] => 06891491
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-05-10
[patent_title] => 'Method and apparatus for correction of A/D converted output data'
[patent_app_type] => utility
[patent_app_number] => 10/791649
[patent_app_country] => US
[patent_app_date] => 2004-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 21
[patent_no_of_words] => 16734
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/891/06891491.pdf
[firstpage_image] =>[orig_patent_app_number] => 10791649
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/791649 | Method and apparatus for correction of A/D converted output data | Mar 1, 2004 | Issued |
Array
(
[id] => 1032104
[patent_doc_number] => 06879269
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-12
[patent_title] => 'Code generation and allocation method'
[patent_app_type] => utility
[patent_app_number] => 10/787141
[patent_app_country] => US
[patent_app_date] => 2004-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 28
[patent_no_of_words] => 5452
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/879/06879269.pdf
[firstpage_image] =>[orig_patent_app_number] => 10787141
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/787141 | Code generation and allocation method | Feb 26, 2004 | Issued |
Array
(
[id] => 7616574
[patent_doc_number] => 06946868
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-09-20
[patent_title] => 'Line reflection reduction with energy-recovery driver'
[patent_app_type] => utility
[patent_app_number] => 10/776927
[patent_app_country] => US
[patent_app_date] => 2004-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 6032
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/946/06946868.pdf
[firstpage_image] =>[orig_patent_app_number] => 10776927
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/776927 | Line reflection reduction with energy-recovery driver | Feb 9, 2004 | Issued |
Array
(
[id] => 7409603
[patent_doc_number] => 20040227546
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-18
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => new
[patent_app_number] => 10/770749
[patent_app_country] => US
[patent_app_date] => 2004-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 10230
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 3
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0227/20040227546.pdf
[firstpage_image] =>[orig_patent_app_number] => 10770749
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/770749 | Semiconductor integrated circuit | Feb 3, 2004 | Issued |