
Perry H. Hackley Jr.
Examiner (ID: 17371)
| Most Active Art Unit | 5332 |
| Art Unit(s) | 5332, 5432 |
| Total Applications | 486 |
| Issued Applications | 0 |
| Pending Applications | 486 |
| Abandoned Applications | 0 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16637786
[patent_doc_number] => 10916300
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-09
[patent_title] => Semiconductor memory device and memory system
[patent_app_type] => utility
[patent_app_number] => 16/896601
[patent_app_country] => US
[patent_app_date] => 2020-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 93
[patent_figures_cnt] => 95
[patent_no_of_words] => 39076
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 321
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16896601
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/896601 | Semiconductor memory device and memory system | Jun 8, 2020 | Issued |
Array
(
[id] => 16936094
[patent_doc_number] => 20210201983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => MEMORY DEVICE INCLUDING DATA INPUT/OUTPUT CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 16/893978
[patent_app_country] => US
[patent_app_date] => 2020-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3839
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893978
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/893978 | Memory device including data input/output circuit | Jun 4, 2020 | Issued |
Array
(
[id] => 17195888
[patent_doc_number] => 11164653
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-02
[patent_title] => Repair analysis circuit and memory including the same
[patent_app_type] => utility
[patent_app_number] => 16/889426
[patent_app_country] => US
[patent_app_date] => 2020-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8094
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16889426
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/889426 | Repair analysis circuit and memory including the same | May 31, 2020 | Issued |
Array
(
[id] => 16803120
[patent_doc_number] => 10998071
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-04
[patent_title] => Systems and methods to test a memory device
[patent_app_type] => utility
[patent_app_number] => 16/889686
[patent_app_country] => US
[patent_app_date] => 2020-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 10306
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16889686
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/889686 | Systems and methods to test a memory device | May 31, 2020 | Issued |
Array
(
[id] => 16315867
[patent_doc_number] => 20200294605
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-17
[patent_title] => MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/886546
[patent_app_country] => US
[patent_app_date] => 2020-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10123
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16886546
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/886546 | Memory system | May 27, 2020 | Issued |
Array
(
[id] => 17818329
[patent_doc_number] => 11423950
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-23
[patent_title] => Solid state drive device and method for fabricating solid state drive device
[patent_app_type] => utility
[patent_app_number] => 16/885832
[patent_app_country] => US
[patent_app_date] => 2020-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 7821
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885832
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/885832 | Solid state drive device and method for fabricating solid state drive device | May 27, 2020 | Issued |
Array
(
[id] => 16502681
[patent_doc_number] => 10868079
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-15
[patent_title] => Magnetic detection circuit, MRAM and operation method thereof
[patent_app_type] => utility
[patent_app_number] => 16/882600
[patent_app_country] => US
[patent_app_date] => 2020-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7521
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882600
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/882600 | Magnetic detection circuit, MRAM and operation method thereof | May 24, 2020 | Issued |
Array
(
[id] => 17224486
[patent_doc_number] => 11176996
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-16
[patent_title] => Resistive random access memory and resetting method thereof
[patent_app_type] => utility
[patent_app_number] => 15/930469
[patent_app_country] => US
[patent_app_date] => 2020-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 5497
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930469
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/930469 | Resistive random access memory and resetting method thereof | May 12, 2020 | Issued |
Array
(
[id] => 16645345
[patent_doc_number] => 10923209
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-16
[patent_title] => Semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 15/930104
[patent_app_country] => US
[patent_app_date] => 2020-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4318
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930104
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/930104 | Semiconductor memory device | May 11, 2020 | Issued |
Array
(
[id] => 17181113
[patent_doc_number] => 11158361
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-26
[patent_title] => Memory cell arrangement and methods thereof
[patent_app_type] => utility
[patent_app_number] => 16/870013
[patent_app_country] => US
[patent_app_date] => 2020-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 24056
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16870013
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/870013 | Memory cell arrangement and methods thereof | May 7, 2020 | Issued |
Array
(
[id] => 16944395
[patent_doc_number] => 11056648
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-07-06
[patent_title] => Semiconductor device including variable resistance element
[patent_app_type] => utility
[patent_app_number] => 16/868429
[patent_app_country] => US
[patent_app_date] => 2020-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 8980
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16868429
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/868429 | Semiconductor device including variable resistance element | May 5, 2020 | Issued |
Array
(
[id] => 16495525
[patent_doc_number] => 10861572
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-08
[patent_title] => Memory device
[patent_app_type] => utility
[patent_app_number] => 16/856553
[patent_app_country] => US
[patent_app_date] => 2020-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 8216
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856553
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/856553 | Memory device | Apr 22, 2020 | Issued |
Array
(
[id] => 16323963
[patent_doc_number] => 10783933
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-22
[patent_title] => Semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 16/854394
[patent_app_country] => US
[patent_app_date] => 2020-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 41
[patent_no_of_words] => 17468
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854394
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/854394 | Semiconductor memory device | Apr 20, 2020 | Issued |
Array
(
[id] => 16943932
[patent_doc_number] => 11056180
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-06
[patent_title] => Non-volatile memory data bus
[patent_app_type] => utility
[patent_app_number] => 16/853036
[patent_app_country] => US
[patent_app_date] => 2020-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3933
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16853036
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/853036 | Non-volatile memory data bus | Apr 19, 2020 | Issued |
Array
(
[id] => 16371202
[patent_doc_number] => 10802963
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-13
[patent_title] => Power-supply device and electronic device including the same
[patent_app_type] => utility
[patent_app_number] => 16/852181
[patent_app_country] => US
[patent_app_date] => 2020-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7088
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16852181
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/852181 | Power-supply device and electronic device including the same | Apr 16, 2020 | Issued |
Array
(
[id] => 17786232
[patent_doc_number] => 11409354
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Multi-voltage operation for driving a multi-mode channel
[patent_app_type] => utility
[patent_app_number] => 16/849746
[patent_app_country] => US
[patent_app_date] => 2020-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 20519
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16849746
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/849746 | Multi-voltage operation for driving a multi-mode channel | Apr 14, 2020 | Issued |
Array
(
[id] => 16973420
[patent_doc_number] => 11069399
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-20
[patent_title] => 3-dimensional memory device
[patent_app_type] => utility
[patent_app_number] => 16/840596
[patent_app_country] => US
[patent_app_date] => 2020-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 10168
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16840596
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/840596 | 3-dimensional memory device | Apr 5, 2020 | Issued |
Array
(
[id] => 16347741
[patent_doc_number] => 20200312392
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-01
[patent_title] => STORAGE ELEMENT, SEMICONDUCTOR DEVICE, MAGNETIC RECORDING ARRAY, AND METHOD OF PRODUCING STORAGE ELEMENT
[patent_app_type] => utility
[patent_app_number] => 16/829188
[patent_app_country] => US
[patent_app_date] => 2020-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10602
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16829188
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/829188 | Storage element, semiconductor device, magnetic recording array, and method of producing storage element | Mar 24, 2020 | Issued |
Array
(
[id] => 16479352
[patent_doc_number] => 10854305
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-01
[patent_title] => Using a status indicator in a memory sub-system to detect an event
[patent_app_type] => utility
[patent_app_number] => 16/820636
[patent_app_country] => US
[patent_app_date] => 2020-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7505
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16820636
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/820636 | Using a status indicator in a memory sub-system to detect an event | Mar 15, 2020 | Issued |
Array
(
[id] => 16438456
[patent_doc_number] => 20200355782
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => MULTI-SENSOR TARGET TRACKING USING MULTIPLE HYPOTHESIS TESTING
[patent_app_type] => utility
[patent_app_number] => 16/812450
[patent_app_country] => US
[patent_app_date] => 2020-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3227
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 288
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16812450
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/812450 | MULTI-SENSOR TARGET TRACKING USING MULTIPLE HYPOTHESIS TESTING | Mar 8, 2020 | Abandoned |