Search

Peter A. Hruskoci

Examiner (ID: 14243)

Most Active Art Unit
1724
Art Unit(s)
1724, 1778, 2899, 1776, 1723, 3307, 1308, 1801, 1306, 1797
Total Applications
2898
Issued Applications
2282
Pending Applications
120
Abandoned Applications
496

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20546076 [patent_doc_number] => 20260052969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-19 [patent_title] => FABRICATION METHODS OF 3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS AND CONNECTION PATH [patent_app_type] => utility [patent_app_number] => 19/369245 [patent_app_country] => US [patent_app_date] => 2025-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19369245 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/369245
FABRICATION METHODS OF 3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS AND CONNECTION PATH Oct 25, 2025 Pending
Array ( [id] => 20283967 [patent_doc_number] => 20250309209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDING [patent_app_type] => utility [patent_app_number] => 19/232790 [patent_app_country] => US [patent_app_date] => 2025-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19232790 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/232790
MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDING Jun 8, 2025 Pending
Array ( [id] => 20540523 [patent_doc_number] => 12557612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Bonding system with sealing gasket and method for using the same [patent_app_type] => utility [patent_app_number] => 19/040693 [patent_app_country] => US [patent_app_date] => 2025-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 2420 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19040693 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/040693
Bonding system with sealing gasket and method for using the same Jan 28, 2025 Issued
Array ( [id] => 20019711 [patent_doc_number] => 20250157933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 19/022942 [patent_app_country] => US [patent_app_date] => 2025-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23997 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19022942 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/022942
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE Jan 14, 2025 Pending
Array ( [id] => 20120915 [patent_doc_number] => 20250235946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => PORTABLE BATTERY PACK-POWERED WELDER [patent_app_type] => utility [patent_app_number] => 19/018545 [patent_app_country] => US [patent_app_date] => 2025-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19018545 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/018545
PORTABLE BATTERY PACK-POWERED WELDER Jan 12, 2025 Pending
Array ( [id] => 20360163 [patent_doc_number] => 12476168 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => 3D semiconductor device and structure with three levels and isolation layers [patent_app_type] => utility [patent_app_number] => 18/778977 [patent_app_country] => US [patent_app_date] => 2024-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 73 [patent_figures_cnt] => 74 [patent_no_of_words] => 15374 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18778977 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/778977
3D semiconductor device and structure with three levels and isolation layers Jul 19, 2024 Issued
Array ( [id] => 20424478 [patent_doc_number] => 20250386564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => PATTERNED TRENCHES FOR NANORIBBON-BASED TRANSISTOR REGISTRATION AND ALIGNMENT [patent_app_type] => utility [patent_app_number] => 18/740820 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740820 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/740820
PATTERNED TRENCHES FOR NANORIBBON-BASED TRANSISTOR REGISTRATION AND ALIGNMENT Jun 11, 2024 Pending
Array ( [id] => 19467943 [patent_doc_number] => 20240321613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SYSTEMS AND METHODS FOR SYSTEMATIC PHYSICAL FAILURE ANALYSIS (PFA) FAULT LOCALIZATION [patent_app_type] => utility [patent_app_number] => 18/679252 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679252 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/679252
Systems and methods for systematic physical failure analysis (PFA) fault localization May 29, 2024 Issued
Array ( [id] => 19964944 [patent_doc_number] => 12334464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Encapsulated package including device dies connected via interconnect die [patent_app_type] => utility [patent_app_number] => 18/629641 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 28 [patent_no_of_words] => 2076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629641 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629641
Encapsulated package including device dies connected via interconnect die Apr 7, 2024 Issued
Array ( [id] => 19419568 [patent_doc_number] => 20240295691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDING [patent_app_type] => utility [patent_app_number] => 18/622867 [patent_app_country] => US [patent_app_date] => 2024-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622867 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/622867
Multilevel semiconductor device and structure with oxide bonding Mar 29, 2024 Issued
Array ( [id] => 19337165 [patent_doc_number] => 20240251595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => ELECTRONIC APPARATUS AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/604923 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604923 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604923
Electronic apparatus with polarization plate and manufacturing method thereof Mar 13, 2024 Issued
Array ( [id] => 19728799 [patent_doc_number] => 20250031550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => DISPLAY DEVICE AND METHOD FOR FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/602028 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16640 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602028 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/602028
DISPLAY DEVICE AND METHOD FOR FABRICATION THEREOF Mar 11, 2024 Pending
Array ( [id] => 19452711 [patent_doc_number] => 20240312841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => ELEMENT CHIP MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/602117 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602117 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/602117
ELEMENT CHIP MANUFACTURING METHOD Mar 11, 2024 Pending
Array ( [id] => 20237531 [patent_doc_number] => 20250294850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => MEMORY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/602039 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602039 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/602039
MEMORY DEVICE AND MANUFACTURING METHOD THEREOF Mar 11, 2024 Pending
Array ( [id] => 19852859 [patent_doc_number] => 20250098210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/601851 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601851 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601851
SEMICONDUCTOR DEVICE Mar 10, 2024 Pending
Array ( [id] => 19531926 [patent_doc_number] => 20240355828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/601840 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601840 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601840
DISPLAY DEVICE Mar 10, 2024 Pending
Array ( [id] => 20210897 [patent_doc_number] => 20250280617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => IMAGE SENSOR AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/591557 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591557 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/591557
IMAGE SENSOR AND MANUFACTURING METHOD THEREOF Feb 28, 2024 Pending
Array ( [id] => 20267136 [patent_doc_number] => 12438135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Multilayer power, converter with devices having reduced lateral current [patent_app_type] => utility [patent_app_number] => 18/432387 [patent_app_country] => US [patent_app_date] => 2024-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 2087 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18432387 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/432387
Multilayer power, converter with devices having reduced lateral current Feb 4, 2024 Issued
Array ( [id] => 19351421 [patent_doc_number] => 20240260385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/412402 [patent_app_country] => US [patent_app_date] => 2024-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15717 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18412402 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/412402
DISPLAY APPARATUS Jan 11, 2024 Pending
Array ( [id] => 19130821 [patent_doc_number] => 20240136174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => INTEGRATED STEALTH LASER FOR WAFER EDGE TRIMMING PROCESS [patent_app_type] => utility [patent_app_number] => 18/402991 [patent_app_country] => US [patent_app_date] => 2024-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402991 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402991
Integrated aligned stealth laser for wafer edge trimming process Jan 2, 2024 Issued
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