Search

Peter A. Hruskoci

Examiner (ID: 14243)

Most Active Art Unit
1724
Art Unit(s)
1724, 1778, 2899, 1776, 1723, 3307, 1308, 1801, 1306, 1797
Total Applications
2898
Issued Applications
2282
Pending Applications
120
Abandoned Applications
496

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15351961 [patent_doc_number] => 20200013872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => Spacer Structure with High Plasma Resistance for Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 16/575974 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575974 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/575974
Spacer structure with high plasma resistance for semiconductor devices Sep 18, 2019 Issued
Array ( [id] => 15415057 [patent_doc_number] => 20200027851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => Interconnect Chips [patent_app_type] => utility [patent_app_number] => 16/575573 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6870 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575573 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/575573
Interconnect chips Sep 18, 2019 Issued
Array ( [id] => 15687921 [patent_doc_number] => 20200098624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => FILM FORMING METHOD AND FILM FORMING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/574757 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574757 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/574757
Film forming method and film forming apparatus Sep 17, 2019 Issued
Array ( [id] => 16348247 [patent_doc_number] => 20200312898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => IMAGE SENSOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/571764 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3724 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571764 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571764
Image sensor package with particle blocking dam Sep 15, 2019 Issued
Array ( [id] => 16715943 [patent_doc_number] => 20210083090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/571817 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571817 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571817
Gate all around structure with additional silicon layer and method for forming the same Sep 15, 2019 Issued
Array ( [id] => 15775787 [patent_doc_number] => 20200118911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 16/571502 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571502 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571502
Semiconductor element including encapsulated lead frames Sep 15, 2019 Issued
Array ( [id] => 15331937 [patent_doc_number] => 20200006298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => LIGHT EMITTING DIODE PACKAGE AND LIGHT EMITTING DIODE MODULE [patent_app_type] => utility [patent_app_number] => 16/566823 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566823 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/566823
Light emitting diode package and light emitting diode module Sep 9, 2019 Issued
Array ( [id] => 17002822 [patent_doc_number] => 11081645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Mask assembly with surface roughened mask sheet at welding location, method of manufacturing the same, and method of manufacturing display device using the same [patent_app_type] => utility [patent_app_number] => 16/563619 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 6999 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16563619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/563619
Mask assembly with surface roughened mask sheet at welding location, method of manufacturing the same, and method of manufacturing display device using the same Sep 5, 2019 Issued
Array ( [id] => 15597811 [patent_doc_number] => 20200075440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/560493 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560493 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560493
Semiconductor device with recessed end surface of lead Sep 3, 2019 Issued
Array ( [id] => 15840745 [patent_doc_number] => 20200135655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Graphene Layer for Reduced Contact Resistance [patent_app_type] => utility [patent_app_number] => 16/560585 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560585 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560585
Graphene layer for reduced contact resistance Sep 3, 2019 Issued
Array ( [id] => 16553130 [patent_doc_number] => 10886295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/560606 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 9099 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560606 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560606
Semiconductor storage device Sep 3, 2019 Issued
Array ( [id] => 16210505 [patent_doc_number] => 20200243495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => MULTI-LAYER POWER CONVERTER WITH DEVICES HAVING REDUCED LATERAL CURRENT [patent_app_type] => utility [patent_app_number] => 16/558679 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558679 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558679
Multi-layer power converter with devices having reduced lateral current Sep 2, 2019 Issued
Array ( [id] => 17683369 [patent_doc_number] => 11367634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Substrate treating apparatus with edge treating unit and substrate treating method [patent_app_type] => utility [patent_app_number] => 16/557790 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 6528 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557790 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557790
Substrate treating apparatus with edge treating unit and substrate treating method Aug 29, 2019 Issued
Array ( [id] => 15597697 [patent_doc_number] => 20200075383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => CERAMICS SUBSTRATE AND ELECTROSTATIC CHUCK [patent_app_type] => utility [patent_app_number] => 16/555011 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555011 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/555011
Ceramic substrate containing aluminum oxide and electrostatic chuck having electrode containing tungsten with oxides Aug 28, 2019 Issued
Array ( [id] => 17559189 [patent_doc_number] => 11315911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Combined display panel with overlapping sub-screens [patent_app_type] => utility [patent_app_number] => 16/617513 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2820 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16617513 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/617513
Combined display panel with overlapping sub-screens Aug 22, 2019 Issued
Array ( [id] => 15929109 [patent_doc_number] => 20200156188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => STAGE FOR CUTTING SUBSTRATE AND SUBSTRATE-CUTTING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/547354 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547354 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547354
Stage for cutting substrate including removable tube line and substrate-cutting apparatus therof Aug 20, 2019 Issued
Array ( [id] => 16660715 [patent_doc_number] => 20210057352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => FAN-OUT PACKAGE WITH REINFORCING RIVETS [patent_app_type] => utility [patent_app_number] => 16/544021 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544021
Fan-out package with reinforcing rivets Aug 18, 2019 Issued
Array ( [id] => 15841157 [patent_doc_number] => 20200135861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Transistors with Stacked Semiconductor Layers as Channels [patent_app_type] => utility [patent_app_number] => 16/542523 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542523 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542523
Transistors with stacked semiconductor layers as channels Aug 15, 2019 Issued
Array ( [id] => 16631758 [patent_doc_number] => 20210050411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => SEMICONDUCTOR SUBSTRATE INCLUDING STRESS MEMORIZATION LAYER [patent_app_type] => utility [patent_app_number] => 16/542667 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542667 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542667
Method of forming stress memorization layer on backside of semiconductor substrate and semiconductor device thereof Aug 15, 2019 Issued
Array ( [id] => 16566976 [patent_doc_number] => 10892353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/543106 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 11429 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543106 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543106
Semiconductor device and method of manufacturing the same Aug 15, 2019 Issued
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