Search

Peter A. Hruskoci

Examiner (ID: 14243)

Most Active Art Unit
1724
Art Unit(s)
1724, 1778, 2899, 1776, 1723, 3307, 1308, 1801, 1306, 1797
Total Applications
2898
Issued Applications
2282
Pending Applications
120
Abandoned Applications
496

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18729383 [patent_doc_number] => 20230343679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND A CONNECTIVE PATH [patent_app_type] => utility [patent_app_number] => 18/215631 [patent_app_country] => US [patent_app_date] => 2023-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18215631 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/215631
3D semiconductor device and structure with metal layers and a connective path Jun 27, 2023 Issued
Array ( [id] => 19646430 [patent_doc_number] => 20240420950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => DENSIFIED SEAM-FREE SILICON-CONTAINING MATERIAL GAP FILL PROCESSES [patent_app_type] => utility [patent_app_number] => 18/209732 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8665 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209732 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/209732
DENSIFIED SEAM-FREE SILICON-CONTAINING MATERIAL GAP FILL PROCESSES Jun 13, 2023 Pending
Array ( [id] => 18680089 [patent_doc_number] => 20230317747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => CAMERA MODULE HAVING CIRCUIT BOARD, PHOTOSENSITIVE ELEMENT, OPTICAL LENS, AND FILTER ELEMENT [patent_app_type] => utility [patent_app_number] => 18/207357 [patent_app_country] => US [patent_app_date] => 2023-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 58125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18207357 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/207357
Circuit board assembly with photosensitive element mounted to back side of circuit board Jun 7, 2023 Issued
Array ( [id] => 18776406 [patent_doc_number] => 20230371244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => MEMORY DEVICE HAVING VERTICAL TRANSISTORS AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/197505 [patent_app_country] => US [patent_app_date] => 2023-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18197505 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/197505
Memory device having an array of vertical transistors with associated lines and method for forming the same May 14, 2023 Issued
Array ( [id] => 19690244 [patent_doc_number] => 20250008789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/275025 [patent_app_country] => US [patent_app_date] => 2023-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18275025 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/275025
DISPLAY PANEL AND DISPLAY DEVICE May 11, 2023 Pending
Array ( [id] => 18884895 [patent_doc_number] => 20240008264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => SEMICONDUCTOR DEVICE WITH VANADIUM-CONTAINING SPACERS AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/195512 [patent_app_country] => US [patent_app_date] => 2023-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9093 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195512 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195512
Semiconductor device with vanadium-containing spacers and method for fabricating the same May 9, 2023 Issued
Array ( [id] => 19575213 [patent_doc_number] => 20240379505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => Bond Films for Reduced Thermal Resistance and Methods Forming the Same [patent_app_type] => utility [patent_app_number] => 18/314356 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7012 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18314356 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/314356
Bond Films for Reduced Thermal Resistance and Methods Forming the Same May 8, 2023 Pending
Array ( [id] => 19720313 [patent_doc_number] => 12205856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Semiconductor structure including interconnection to probe pad with probe mark [patent_app_type] => utility [patent_app_number] => 18/314126 [patent_app_country] => US [patent_app_date] => 2023-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 10194 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18314126 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/314126
Semiconductor structure including interconnection to probe pad with probe mark May 7, 2023 Issued
Array ( [id] => 19148579 [patent_doc_number] => 20240147697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/308376 [patent_app_country] => US [patent_app_date] => 2023-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308376 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/308376
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Apr 26, 2023 Pending
Array ( [id] => 18570472 [patent_doc_number] => 20230260809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => LASER LIGHT SOURCE AND A LASER CRYSTALLIZATION APPARATUS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/139414 [patent_app_country] => US [patent_app_date] => 2023-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18139414 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/139414
Laser light source and a laser crystallization apparatus including the same Apr 25, 2023 Issued
Array ( [id] => 19567789 [patent_doc_number] => 12142568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Multi-die ultrafine pitch patch architecture of interconnect bridge over glass layer and method of making [patent_app_type] => utility [patent_app_number] => 18/139275 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 9727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18139275 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/139275
Multi-die ultrafine pitch patch architecture of interconnect bridge over glass layer and method of making Apr 24, 2023 Issued
Array ( [id] => 18555279 [patent_doc_number] => 20230253296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND A CONNECTIVE PATH [patent_app_type] => utility [patent_app_number] => 18/136336 [patent_app_country] => US [patent_app_date] => 2023-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18136336 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/136336
3D semiconductor device and structure with metal layers and a connective path Apr 18, 2023 Issued
Array ( [id] => 18555391 [patent_doc_number] => 20230253408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDING [patent_app_type] => utility [patent_app_number] => 18/136335 [patent_app_country] => US [patent_app_date] => 2023-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18136335 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/136335
Multilevel semiconductor device and structure with oxide bonding Apr 17, 2023 Issued
Array ( [id] => 18555201 [patent_doc_number] => 20230253218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/135618 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18135618 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/135618
Method of manufacturing semiconductor device using stationary laser module Apr 16, 2023 Issued
Array ( [id] => 20748212 [patent_doc_number] => 12648151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-02 [patent_title] => Semiconductor memory device with barrier layers between gap-fill patterns and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/299683 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 3274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299683 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/299683
Semiconductor memory device with barrier layers between gap-fill patterns and method of manufacturing the same Apr 11, 2023 Issued
Array ( [id] => 20532199 [patent_doc_number] => 12550652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => Wafer edge trimming process including water jet and wedge separation and methods thereof [patent_app_type] => utility [patent_app_number] => 18/297946 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 4829 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18297946 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/297946
Wafer edge trimming process including water jet and wedge separation and methods thereof Apr 9, 2023 Issued
Array ( [id] => 19502073 [patent_doc_number] => 20240341091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => DATA STORAGE NODE VOLTAGE MONITOR CIRCUIT AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/296389 [patent_app_country] => US [patent_app_date] => 2023-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9838 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18296389 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/296389
Data storage node voltage monitor circuit and methods for forming the same Apr 5, 2023 Issued
Array ( [id] => 20457439 [patent_doc_number] => 12520511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => High electron mobility transistor structure including passivation capping layer and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/129928 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18129928 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/129928
High electron mobility transistor structure including passivation capping layer and method of manufacturing the same Apr 2, 2023 Issued
Array ( [id] => 19484236 [patent_doc_number] => 20240332278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => ROUTABILITY IMPROVEMENT FOR AN ULTRA-HIGH DENSE STANDARD CELL ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 18/295225 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9553 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295225 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295225
Adjacent cell routing resource connectivity Apr 2, 2023 Issued
Array ( [id] => 18945631 [patent_doc_number] => 20240040770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/194642 [patent_app_country] => US [patent_app_date] => 2023-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10950 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18194642 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/194642
Semiconductor memory devices including stepwise profiles and methods of fabricating the same Apr 1, 2023 Issued
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