Search

Peter A. Szekely

Examiner (ID: 3545)

Most Active Art Unit
1714
Art Unit(s)
1714, 1761, 1796, 1509, 1766, 2754, 1511
Total Applications
3111
Issued Applications
2334
Pending Applications
106
Abandoned Applications
672

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5828797 [patent_doc_number] => 20020068436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Resist trim process to define small openings in dielectric layers' [patent_app_type] => new [patent_app_number] => 09/731577 [patent_app_country] => US [patent_app_date] => 2000-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4068 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20020068436.pdf [firstpage_image] =>[orig_patent_app_number] => 09731577 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/731577
Resist trim process to define small openings in dielectric layers Dec 5, 2000 Issued
Array ( [id] => 5828722 [patent_doc_number] => 20020068415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Method of fabricating a shallow trench isolation structure' [patent_app_type] => new [patent_app_number] => 09/728677 [patent_app_country] => US [patent_app_date] => 2000-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1618 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20020068415.pdf [firstpage_image] =>[orig_patent_app_number] => 09728677 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/728677
Method of fabricating a shallow trench isolation structure Nov 30, 2000 Abandoned
Array ( [id] => 1394380 [patent_doc_number] => 06541354 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-01 [patent_title] => 'Method for forming silicon film' [patent_app_type] => B1 [patent_app_number] => 09/701647 [patent_app_country] => US [patent_app_date] => 2000-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5933 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/541/06541354.pdf [firstpage_image] =>[orig_patent_app_number] => 09701647 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/701647
Method for forming silicon film Nov 29, 2000 Issued
Array ( [id] => 1595742 [patent_doc_number] => 06492268 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Method of forming a copper wiring in a semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/721967 [patent_app_country] => US [patent_app_date] => 2000-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 8592 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/492/06492268.pdf [firstpage_image] =>[orig_patent_app_number] => 09721967 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/721967
Method of forming a copper wiring in a semiconductor device Nov 26, 2000 Issued
09/716737 Unity-K gas dome dielectric system for ULSI interconnects Nov 19, 2000 Abandoned
Array ( [id] => 7636561 [patent_doc_number] => 06380095 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Silicon trench etch using silicon-containing precursors to reduce or avoid mask erosion' [patent_app_type] => B1 [patent_app_number] => 09/716074 [patent_app_country] => US [patent_app_date] => 2000-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 8534 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/380/06380095.pdf [firstpage_image] =>[orig_patent_app_number] => 09716074 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/716074
Silicon trench etch using silicon-containing precursors to reduce or avoid mask erosion Nov 15, 2000 Issued
Array ( [id] => 1450067 [patent_doc_number] => 06455416 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Developer soluble dyed BARC for dual damascene process' [patent_app_type] => B1 [patent_app_number] => 09/706967 [patent_app_country] => US [patent_app_date] => 2000-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 5638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/455/06455416.pdf [firstpage_image] =>[orig_patent_app_number] => 09706967 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/706967
Developer soluble dyed BARC for dual damascene process Nov 5, 2000 Issued
Array ( [id] => 1414745 [patent_doc_number] => 06521528 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Semiconductor device and method of making thereof' [patent_app_type] => B1 [patent_app_number] => 09/696227 [patent_app_country] => US [patent_app_date] => 2000-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 8065 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521528.pdf [firstpage_image] =>[orig_patent_app_number] => 09696227 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/696227
Semiconductor device and method of making thereof Oct 25, 2000 Issued
Array ( [id] => 1418985 [patent_doc_number] => 06506639 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'Method of forming low resistance reduced channel length transistors' [patent_app_type] => B1 [patent_app_number] => 09/691717 [patent_app_country] => US [patent_app_date] => 2000-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 50 [patent_no_of_words] => 4229 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/506/06506639.pdf [firstpage_image] =>[orig_patent_app_number] => 09691717 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/691717
Method of forming low resistance reduced channel length transistors Oct 17, 2000 Issued
09/675827 One-step etch processes for dual damascene metallization Sep 28, 2000 Abandoned
Array ( [id] => 1534581 [patent_doc_number] => 06489216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Chemical mechanical polish (CMP) planarizing method employing topographic mark preservation' [patent_app_type] => B1 [patent_app_number] => 09/677067 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 4790 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/489/06489216.pdf [firstpage_image] =>[orig_patent_app_number] => 09677067 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/677067
Chemical mechanical polish (CMP) planarizing method employing topographic mark preservation Sep 28, 2000 Issued
09/670917 SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND APPARATUS FOR REMOVING SILICON NITRIDE FORMED IN A REACTION CONTAINER WITH NF3 GAS FLOWING INTO THE REACTION CONTAINER Sep 28, 2000 Abandoned
Array ( [id] => 7629878 [patent_doc_number] => 06818478 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Resin ceramic compositions having magnetic properties' [patent_app_type] => B1 [patent_app_number] => 09/665377 [patent_app_country] => US [patent_app_date] => 2000-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4238 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/818/06818478.pdf [firstpage_image] =>[orig_patent_app_number] => 09665377 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/665377
Resin ceramic compositions having magnetic properties Sep 19, 2000 Issued
Array ( [id] => 1386160 [patent_doc_number] => 06548380 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film' [patent_app_type] => B1 [patent_app_number] => 09/658667 [patent_app_country] => US [patent_app_date] => 2000-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 14951 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/548/06548380.pdf [firstpage_image] =>[orig_patent_app_number] => 09658667 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/658667
Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film Sep 7, 2000 Issued
Array ( [id] => 1371055 [patent_doc_number] => 06562648 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Structure and method for separation and transfer of semiconductor thin films onto dissimilar substrate materials' [patent_app_type] => B1 [patent_app_number] => 09/648187 [patent_app_country] => US [patent_app_date] => 2000-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4421 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/562/06562648.pdf [firstpage_image] =>[orig_patent_app_number] => 09648187 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/648187
Structure and method for separation and transfer of semiconductor thin films onto dissimilar substrate materials Aug 22, 2000 Issued
Array ( [id] => 773311 [patent_doc_number] => 07001777 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-21 [patent_title] => 'Method of manufacturing a magnetic tunnel junction device' [patent_app_type] => utility [patent_app_number] => 09/787457 [patent_app_country] => US [patent_app_date] => 2000-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2240 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/001/07001777.pdf [firstpage_image] =>[orig_patent_app_number] => 09787457 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/787457
Method of manufacturing a magnetic tunnel junction device Jul 16, 2000 Issued
Array ( [id] => 1440165 [patent_doc_number] => 06495479 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Simplified method to produce nanoporous silicon-based films' [patent_app_type] => B1 [patent_app_number] => 09/566287 [patent_app_country] => US [patent_app_date] => 2000-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 9332 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/495/06495479.pdf [firstpage_image] =>[orig_patent_app_number] => 09566287 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/566287
Simplified method to produce nanoporous silicon-based films May 4, 2000 Issued
Array ( [id] => 1561271 [patent_doc_number] => 06362116 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Method for controlling photoresist baking processes' [patent_app_type] => B1 [patent_app_number] => 09/500727 [patent_app_country] => US [patent_app_date] => 2000-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3042 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362116.pdf [firstpage_image] =>[orig_patent_app_number] => 09500727 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/500727
Method for controlling photoresist baking processes Feb 8, 2000 Issued
Array ( [id] => 1299699 [patent_doc_number] => 06624049 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/416640 [patent_app_country] => US [patent_app_date] => 1999-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 68 [patent_no_of_words] => 21630 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/624/06624049.pdf [firstpage_image] =>[orig_patent_app_number] => 09416640 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/416640
Semiconductor device and method of manufacturing the same Oct 11, 1999 Issued
Array ( [id] => 4407492 [patent_doc_number] => 06239009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Flash memory device and method for manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/409677 [patent_app_country] => US [patent_app_date] => 1999-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 50 [patent_no_of_words] => 5240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/239/06239009.pdf [firstpage_image] =>[orig_patent_app_number] => 409677 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/409677
Flash memory device and method for manufacturing the same Sep 29, 1999 Issued
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