Search

Peter Bradford

Examiner (ID: 19022, Phone: (571)270-1596 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2895
Total Applications
886
Issued Applications
646
Pending Applications
99
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14753147 [patent_doc_number] => 20190259747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/029799 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5946 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 377 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029799 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029799
IGBT semiconductor device Jul 8, 2018 Issued
Array ( [id] => 16218670 [patent_doc_number] => 10734493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Semiconductor memory device and conductive structure [patent_app_type] => utility [patent_app_number] => 16/029993 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 9306 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029993 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029993
Semiconductor memory device and conductive structure Jul 8, 2018 Issued
Array ( [id] => 14221353 [patent_doc_number] => 20190123061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/029765 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029765 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029765
Three-dimensional memory device and manufacturing method thereof Jul 8, 2018 Issued
Array ( [id] => 14285273 [patent_doc_number] => 20190139921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/030272 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16030272 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/030272
SEMICONDUCTOR DEVICE Jul 8, 2018 Abandoned
Array ( [id] => 15351639 [patent_doc_number] => 20200013711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => HYBRID PACKAGE [patent_app_type] => utility [patent_app_number] => 16/030108 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16030108 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/030108
HYBRID PACKAGE Jul 8, 2018 Abandoned
Array ( [id] => 16187045 [patent_doc_number] => 10720382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-21 [patent_title] => Semiconductor package structure and semiconductor module including the same [patent_app_type] => utility [patent_app_number] => 16/029770 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5643 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029770 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029770
Semiconductor package structure and semiconductor module including the same Jul 8, 2018 Issued
Array ( [id] => 14164011 [patent_doc_number] => 20190109108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => EXPANDED HEAD PILLAR FOR BUMP BONDS [patent_app_type] => utility [patent_app_number] => 16/030371 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16030371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/030371
Expanded head pillar for bump bonds Jul 8, 2018 Issued
Array ( [id] => 13799843 [patent_doc_number] => 20190013460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => MAGNETORESISTIVE STACK/STRUCTURE AND METHODS THEREFOR [patent_app_type] => utility [patent_app_number] => 16/029938 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029938 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029938
Magnetoresistive stack/structure including metal insertion substance Jul 8, 2018 Issued
Array ( [id] => 15200623 [patent_doc_number] => 10497817 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-03 [patent_title] => P-n diodes and p-n-p heterojunction bipolar transistors with diamond collectors and current tunneling layers [patent_app_type] => utility [patent_app_number] => 16/029811 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 29 [patent_no_of_words] => 8399 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029811 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029811
P-n diodes and p-n-p heterojunction bipolar transistors with diamond collectors and current tunneling layers Jul 8, 2018 Issued
Array ( [id] => 14475967 [patent_doc_number] => 20190189632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => MEMORY DEVICES WITH THREE-DIMENSIONAL STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/030170 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12819 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16030170 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/030170
Memory devices with three-dimensional structure Jul 8, 2018 Issued
Array ( [id] => 13528485 [patent_doc_number] => 20180315785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD OF SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/028818 [patent_app_country] => US [patent_app_date] => 2018-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10206 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16028818 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/028818
Solid-state imaging device with charge holding section between trenched transfer gate sections, manufacturing method of same, and electronic apparatus Jul 5, 2018 Issued
Array ( [id] => 14671883 [patent_doc_number] => 10373861 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-06 [patent_title] => FinFET with curved STI [patent_app_type] => utility [patent_app_number] => 16/026077 [patent_app_country] => US [patent_app_date] => 2018-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2574 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16026077 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/026077
FinFET with curved STI Jul 2, 2018 Issued
Array ( [id] => 16308693 [patent_doc_number] => 10777501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/026170 [patent_app_country] => US [patent_app_date] => 2018-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 36 [patent_no_of_words] => 10715 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16026170 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/026170
Semiconductor device and method of manufacturing the same Jul 2, 2018 Issued
Array ( [id] => 13485307 [patent_doc_number] => 20180294196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => SYSTEM AND METHOD FOR PERFORMING A WET ETCHING PROCESS [patent_app_type] => utility [patent_app_number] => 16/003916 [patent_app_country] => US [patent_app_date] => 2018-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24311 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16003916 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/003916
Two etch method for achieving a wafer thickness profile Jun 7, 2018 Issued
Array ( [id] => 14476003 [patent_doc_number] => 20190189650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => ARRAY SUBSTRATE, MANUFACTURING METHOD THEREFOR, DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/327153 [patent_app_country] => US [patent_app_date] => 2018-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16327153 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/327153
Array substrate comprising transistor and capacitor, manufacturing method therefor, display device May 8, 2018 Issued
Array ( [id] => 13405467 [patent_doc_number] => 20180254276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/973186 [patent_app_country] => US [patent_app_date] => 2018-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973186 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/973186
SEMICONDUCTOR DEVICE May 6, 2018 Abandoned
Array ( [id] => 17574285 [patent_doc_number] => 11322560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Display panel with channels in the pixel defining layer [patent_app_type] => utility [patent_app_number] => 16/316111 [patent_app_country] => US [patent_app_date] => 2018-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 8907 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16316111 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/316111
Display panel with channels in the pixel defining layer Apr 19, 2018 Issued
Array ( [id] => 13514295 [patent_doc_number] => 20180308690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => DENSIFYING FILMS IN SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/954521 [patent_app_country] => US [patent_app_date] => 2018-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15954521 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/954521
DENSIFYING FILMS IN SEMICONDUCTOR DEVICE Apr 15, 2018 Abandoned
Array ( [id] => 14475547 [patent_doc_number] => 20190189421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => SEMICONDUCTOR WAFER, AND METHOD FOR POLISHING SEMICONDUCTOR WAFER [patent_app_type] => utility [patent_app_number] => 16/327067 [patent_app_country] => US [patent_app_date] => 2018-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7415 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16327067 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/327067
Semiconductor wafer, and method for polishing semiconductor wafer Apr 5, 2018 Issued
Array ( [id] => 14365225 [patent_doc_number] => 10303919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Display integrated optical fingerprint sensor with angle limiting reflector [patent_app_type] => utility [patent_app_number] => 15/944591 [patent_app_country] => US [patent_app_date] => 2018-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 8173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15944591 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/944591
Display integrated optical fingerprint sensor with angle limiting reflector Apr 2, 2018 Issued
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