Search

Peter Bradford

Examiner (ID: 14800, Phone: (571)270-1596 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2895, 2897
Total Applications
866
Issued Applications
636
Pending Applications
95
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13257441 [patent_doc_number] => 10141418 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-27 [patent_title] => Device with heteroepitaxial structure made using a growth mask [patent_app_type] => utility [patent_app_number] => 14/830241 [patent_app_country] => US [patent_app_date] => 2015-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 5972 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14830241 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/830241
Device with heteroepitaxial structure made using a growth mask Aug 18, 2015 Issued
Array ( [id] => 16132631 [patent_doc_number] => 10700083 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-30 [patent_title] => Method of ONO integration into logic CMOS flow [patent_app_type] => utility [patent_app_number] => 14/824051 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 41 [patent_no_of_words] => 9185 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14824051 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/824051
Method of ONO integration into logic CMOS flow Aug 10, 2015 Issued
Array ( [id] => 10455639 [patent_doc_number] => 20150340654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'ORGANIC SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/818499 [patent_app_country] => US [patent_app_date] => 2015-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5451 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14818499 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/818499
OLED with a flattening layer between two barrier layers Aug 4, 2015 Issued
Array ( [id] => 11475983 [patent_doc_number] => 20170062767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'ORGANIC ELECTROLUMINESCENT DEVICE, ARRAY SUBSTRATE AND DISPLAY APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/119894 [patent_app_country] => US [patent_app_date] => 2015-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4847 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15119894 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/119894
Organic electroluminescent device with functional layers of different refractive indices, and display apparatus having the same Jun 25, 2015 Issued
Array ( [id] => 11360135 [patent_doc_number] => 09536791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-03 [patent_title] => 'Stable multiple threshold voltage devices on replacement metal gate CMOS devices' [patent_app_type] => utility [patent_app_number] => 14/748424 [patent_app_country] => US [patent_app_date] => 2015-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 5578 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14748424 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/748424
Stable multiple threshold voltage devices on replacement metal gate CMOS devices Jun 23, 2015 Issued
Array ( [id] => 10544631 [patent_doc_number] => 09269767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Power superjunction MOSFET device with resurf regions' [patent_app_type] => utility [patent_app_number] => 14/743897 [patent_app_country] => US [patent_app_date] => 2015-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 14011 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 581 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14743897 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/743897
Power superjunction MOSFET device with resurf regions Jun 17, 2015 Issued
Array ( [id] => 11333850 [patent_doc_number] => 09525103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Sapphire substrate having elongated projection and semiconductor light emitting device utilizing the same' [patent_app_type] => utility [patent_app_number] => 14/734961 [patent_app_country] => US [patent_app_date] => 2015-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 27 [patent_no_of_words] => 9493 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14734961 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/734961
Sapphire substrate having elongated projection and semiconductor light emitting device utilizing the same Jun 8, 2015 Issued
Array ( [id] => 11524692 [patent_doc_number] => 09608105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Semiconductor structure with a doped region between two deep trench isolation structures' [patent_app_type] => utility [patent_app_number] => 14/730748 [patent_app_country] => US [patent_app_date] => 2015-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 8537 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14730748 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/730748
Semiconductor structure with a doped region between two deep trench isolation structures Jun 3, 2015 Issued
Array ( [id] => 10576960 [patent_doc_number] => 09299610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Method for manufacturing a transistor with self-aligned terminal contacts' [patent_app_type] => utility [patent_app_number] => 14/714738 [patent_app_country] => US [patent_app_date] => 2015-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4668 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14714738 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/714738
Method for manufacturing a transistor with self-aligned terminal contacts May 17, 2015 Issued
Array ( [id] => 10364032 [patent_doc_number] => 20150249037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-03 [patent_title] => 'MICROELECTRONIC ELEMENTS WITH POST-ASSEMBLY PLANARIZATION' [patent_app_type] => utility [patent_app_number] => 14/708989 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 18877 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14708989 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/708989
Microelectronic elements with post-assembly planarization May 10, 2015 Issued
Array ( [id] => 10350901 [patent_doc_number] => 20150235906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'METHODS FOR ETCHING DIELECTRIC MATERIALS IN THE FABRICATION OF INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 14/705732 [patent_app_country] => US [patent_app_date] => 2015-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14705732 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/705732
METHODS FOR ETCHING DIELECTRIC MATERIALS IN THE FABRICATION OF INTEGRATED CIRCUITS May 5, 2015 Abandoned
Array ( [id] => 11333725 [patent_doc_number] => 09524977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Metal-semiconductor alloy region for enhancing on current in a three-dimensional memory structure' [patent_app_type] => utility [patent_app_number] => 14/687403 [patent_app_country] => US [patent_app_date] => 2015-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 27 [patent_no_of_words] => 15565 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14687403 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/687403
Metal-semiconductor alloy region for enhancing on current in a three-dimensional memory structure Apr 14, 2015 Issued
Array ( [id] => 10336740 [patent_doc_number] => 20150221745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/686436 [patent_app_country] => US [patent_app_date] => 2015-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5315 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14686436 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/686436
HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME Apr 13, 2015 Abandoned
Array ( [id] => 11328381 [patent_doc_number] => 20160358993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'PIXEL STRUCTURE AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE, DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/891926 [patent_app_country] => US [patent_app_date] => 2015-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5635 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14891926 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/891926
Pixel structure and manufacturing method thereof, array substrate, display device Apr 9, 2015 Issued
Array ( [id] => 11096553 [patent_doc_number] => 20160293523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING CONDUCTIVE CLIP WITH FLEXIBLE LEADS AND RELATED METHODS' [patent_app_type] => utility [patent_app_number] => 14/674069 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1750 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14674069 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/674069
Semiconductor device including conductive clip with flexible leads and related methods Mar 30, 2015 Issued
Array ( [id] => 11831713 [patent_doc_number] => 09728462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Stable multiple threshold voltage devices on replacement metal gate CMOS devices' [patent_app_type] => utility [patent_app_number] => 14/672350 [patent_app_country] => US [patent_app_date] => 2015-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 5547 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14672350 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/672350
Stable multiple threshold voltage devices on replacement metal gate CMOS devices Mar 29, 2015 Issued
Array ( [id] => 11096735 [patent_doc_number] => 20160293704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'HYBRID ASPECT RATIO TRAPPING' [patent_app_type] => utility [patent_app_number] => 14/672311 [patent_app_country] => US [patent_app_date] => 2015-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14672311 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/672311
Hybrid aspect ratio trapping Mar 29, 2015 Issued
Array ( [id] => 11709046 [patent_doc_number] => 20170177545 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2017-06-22 [patent_title] => 'SYSTEM AND METHOD FOR PREDICTING TRANSFORMATIVE EVENTS IN MULTIVARIABLE SYSTEMS' [patent_app_type] => utility [patent_app_number] => 14/668814 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6008 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14668814 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/668814
SYSTEM AND METHOD FOR PREDICTING TRANSFORMATIVE EVENTS IN MULTIVARIABLE SYSTEMS Mar 24, 2015 Abandoned
Array ( [id] => 11709046 [patent_doc_number] => 20170177545 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2017-06-22 [patent_title] => 'SYSTEM AND METHOD FOR PREDICTING TRANSFORMATIVE EVENTS IN MULTIVARIABLE SYSTEMS' [patent_app_type] => utility [patent_app_number] => 14/668814 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6008 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14668814 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/668814
SYSTEM AND METHOD FOR PREDICTING TRANSFORMATIVE EVENTS IN MULTIVARIABLE SYSTEMS Mar 24, 2015 Abandoned
Array ( [id] => 11328527 [patent_doc_number] => 20160359139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'MOISTURE ABSORBING MEMBRANE, WATERPROOF MEMBRANE, AND ORGANIC EL DEVICE' [patent_app_type] => utility [patent_app_number] => 15/116581 [patent_app_country] => US [patent_app_date] => 2015-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10482 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15116581 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/116581
MOISTURE ABSORBING MEMBRANE, WATERPROOF MEMBRANE, AND ORGANIC EL DEVICE Mar 5, 2015 Abandoned
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