Search

Peter G. Korytnyk

Examiner (ID: 19334)

Most Active Art Unit
3403
Art Unit(s)
3403, 3746
Total Applications
662
Issued Applications
594
Pending Applications
25
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1296902 [patent_doc_number] => 06633925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-14 [patent_title] => 'Operating system for generating overlapped input-output requests to a device in a disk array storage' [patent_app_type] => B2 [patent_app_number] => 09/731244 [patent_app_country] => US [patent_app_date] => 2000-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 12880 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/633/06633925.pdf [firstpage_image] =>[orig_patent_app_number] => 09731244 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/731244
Operating system for generating overlapped input-output requests to a device in a disk array storage Dec 5, 2000 Issued
09/646953 METHOD FOR SWITCHING APPLICATIONS ON A MULTIPLE APPLICATION CHIP CARD Sep 24, 2000 Abandoned
Array ( [id] => 1338977 [patent_doc_number] => 06601117 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Arrangements for independent queuing/tracking of transaction portions to reduce latency' [patent_app_type] => B1 [patent_app_number] => 09/649171 [patent_app_country] => US [patent_app_date] => 2000-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6240 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/601/06601117.pdf [firstpage_image] =>[orig_patent_app_number] => 09649171 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/649171
Arrangements for independent queuing/tracking of transaction portions to reduce latency Aug 28, 2000 Issued
Array ( [id] => 765066 [patent_doc_number] => 07016990 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-21 [patent_title] => 'Mobile computing system having a modem for operation independent of a main processor and method therefor' [patent_app_type] => utility [patent_app_number] => 09/649268 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2111 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/016/07016990.pdf [firstpage_image] =>[orig_patent_app_number] => 09649268 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/649268
Mobile computing system having a modem for operation independent of a main processor and method therefor Aug 27, 2000 Issued
Array ( [id] => 1236159 [patent_doc_number] => 06694382 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-17 [patent_title] => 'Flexible I/O subsystem architecture and associated test capability' [patent_app_type] => B1 [patent_app_number] => 09/643060 [patent_app_country] => US [patent_app_date] => 2000-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7545 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/694/06694382.pdf [firstpage_image] =>[orig_patent_app_number] => 09643060 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/643060
Flexible I/O subsystem architecture and associated test capability Aug 20, 2000 Issued
Array ( [id] => 1234145 [patent_doc_number] => 06697882 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-24 [patent_title] => 'Memory controller and method control method, and rendering device and printing device using the same' [patent_app_type] => B1 [patent_app_number] => 09/598198 [patent_app_country] => US [patent_app_date] => 2000-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 6403 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/697/06697882.pdf [firstpage_image] =>[orig_patent_app_number] => 09598198 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/598198
Memory controller and method control method, and rendering device and printing device using the same Jun 20, 2000 Issued
Array ( [id] => 1196836 [patent_doc_number] => 06732193 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Method, system, and program for determining a number of write operations to execute' [patent_app_type] => B1 [patent_app_number] => 09/591023 [patent_app_country] => US [patent_app_date] => 2000-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4633 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732193.pdf [firstpage_image] =>[orig_patent_app_number] => 09591023 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/591023
Method, system, and program for determining a number of write operations to execute Jun 8, 2000 Issued
09/590769 Wireless modem simulation of a lan card Jun 7, 2000 Abandoned
Array ( [id] => 1308401 [patent_doc_number] => 06629162 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'System, method, and product in a logically partitioned system for prohibiting I/O adapters from accessing memory assigned to other partitions during DMA' [patent_app_type] => B1 [patent_app_number] => 09/589665 [patent_app_country] => US [patent_app_date] => 2000-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5378 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/629/06629162.pdf [firstpage_image] =>[orig_patent_app_number] => 09589665 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/589665
System, method, and product in a logically partitioned system for prohibiting I/O adapters from accessing memory assigned to other partitions during DMA Jun 7, 2000 Issued
Array ( [id] => 1039956 [patent_doc_number] => 06874041 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-29 [patent_title] => 'Automatic configuration of communication device input or output terminal' [patent_app_type] => utility [patent_app_number] => 09/588830 [patent_app_country] => US [patent_app_date] => 2000-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6540 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/874/06874041.pdf [firstpage_image] =>[orig_patent_app_number] => 09588830 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/588830
Automatic configuration of communication device input or output terminal Jun 6, 2000 Issued
Array ( [id] => 1338987 [patent_doc_number] => 06601118 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Dynamic buffer allocation for a computer system' [patent_app_type] => B1 [patent_app_number] => 09/589043 [patent_app_country] => US [patent_app_date] => 2000-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 13989 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/601/06601118.pdf [firstpage_image] =>[orig_patent_app_number] => 09589043 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/589043
Dynamic buffer allocation for a computer system Jun 5, 2000 Issued
Array ( [id] => 1308353 [patent_doc_number] => 06629155 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Data input/output method and apparatus and storage medium' [patent_app_type] => B1 [patent_app_number] => 09/587288 [patent_app_country] => US [patent_app_date] => 2000-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4274 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/629/06629155.pdf [firstpage_image] =>[orig_patent_app_number] => 09587288 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/587288
Data input/output method and apparatus and storage medium Jun 4, 2000 Issued
Array ( [id] => 1177306 [patent_doc_number] => 06760785 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-06 [patent_title] => 'Method, apparatus, and computer program product for establishing communications between an adapter card and a host processor running in a bios supported environment' [patent_app_type] => B1 [patent_app_number] => 09/538003 [patent_app_country] => US [patent_app_date] => 2000-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6160 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/760/06760785.pdf [firstpage_image] =>[orig_patent_app_number] => 09538003 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/538003
Method, apparatus, and computer program product for establishing communications between an adapter card and a host processor running in a bios supported environment Mar 28, 2000 Issued
Array ( [id] => 1154761 [patent_doc_number] => 06779046 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-17 [patent_title] => 'Serial-data transfer system which has a normal mode and a local mode and devices for the same' [patent_app_type] => B1 [patent_app_number] => 09/536040 [patent_app_country] => US [patent_app_date] => 2000-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14365 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/779/06779046.pdf [firstpage_image] =>[orig_patent_app_number] => 09536040 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/536040
Serial-data transfer system which has a normal mode and a local mode and devices for the same Mar 26, 2000 Issued
Array ( [id] => 1291694 [patent_doc_number] => 06643719 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Equalizing FIFO buffer with adaptive watermark' [patent_app_type] => B1 [patent_app_number] => 09/535891 [patent_app_country] => US [patent_app_date] => 2000-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 5783 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643719.pdf [firstpage_image] =>[orig_patent_app_number] => 09535891 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/535891
Equalizing FIFO buffer with adaptive watermark Mar 26, 2000 Issued
09/533774 USB unit Mar 23, 2000 Abandoned
Array ( [id] => 1324931 [patent_doc_number] => 06615292 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Data transfer apparatus performing DMA data transfer from non-consecutive addresses' [patent_app_type] => B1 [patent_app_number] => 09/532457 [patent_app_country] => US [patent_app_date] => 2000-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3031 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/615/06615292.pdf [firstpage_image] =>[orig_patent_app_number] => 09532457 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/532457
Data transfer apparatus performing DMA data transfer from non-consecutive addresses Mar 22, 2000 Issued
Array ( [id] => 1326626 [patent_doc_number] => 06609160 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Selector with group identification terminals' [patent_app_type] => B1 [patent_app_number] => 09/533950 [patent_app_country] => US [patent_app_date] => 2000-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5673 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/609/06609160.pdf [firstpage_image] =>[orig_patent_app_number] => 09533950 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/533950
Selector with group identification terminals Mar 22, 2000 Issued
09/503896 Automatic configuration method and device Feb 14, 2000 Abandoned
Array ( [id] => 978642 [patent_doc_number] => 06934774 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-23 [patent_title] => 'Method and system for reliable device configuration in a computer system' [patent_app_type] => utility [patent_app_number] => 09/467569 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 5579 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/934/06934774.pdf [firstpage_image] =>[orig_patent_app_number] => 09467569 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/467569
Method and system for reliable device configuration in a computer system Dec 19, 1999 Issued
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