
Peter J. Macchiarolo
Supervisory Patent Examiner (ID: 6406, Phone: (571)272-2375 , Office: P/2856 )
| Most Active Art Unit | 2879 |
| Art Unit(s) | 2856, 2875, 2855, 2879 |
| Total Applications | 714 |
| Issued Applications | 485 |
| Pending Applications | 22 |
| Abandoned Applications | 212 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 330433
[patent_doc_number] => 07510928
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-31
[patent_title] => 'Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniques'
[patent_app_type] => utility
[patent_app_number] => 11/418801
[patent_app_country] => US
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[pdf_file] => patents/07/510/07510928.pdf
[firstpage_image] =>[orig_patent_app_number] => 11418801
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/418801 | Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniques | May 4, 2006 | Issued |
Array
(
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[patent_doc_number] => 07348235
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[patent_kind] => B2
[patent_issue_date] => 2008-03-25
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
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Array
(
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[patent_issue_date] => 2011-01-25
[patent_title] => 'Self-aligned bipolar junction transistors'
[patent_app_type] => utility
[patent_app_number] => 11/411311
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/411311 | Self-aligned bipolar junction transistors | Apr 25, 2006 | Issued |
Array
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[patent_doc_number] => 07470551
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[patent_issue_date] => 2008-12-30
[patent_title] => 'Spin transistor and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/409212
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[firstpage_image] =>[orig_patent_app_number] => 11409212
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/409212 | Spin transistor and manufacturing method thereof | Apr 23, 2006 | Issued |
Array
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[patent_doc_number] => 20060258077
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[patent_title] => 'Formation of deep trench airgaps and related applications'
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Array
(
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[patent_issue_date] => 2007-06-28
[patent_title] => 'Method for fabricating semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/405622
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Array
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[patent_title] => 'Semiconductor device and method of fabricating the same'
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Array
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[id] => 5245187
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[patent_issue_date] => 2007-10-18
[patent_title] => 'SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE'
[patent_app_type] => utility
[patent_app_number] => 11/279934
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Array
(
[id] => 22212
[patent_doc_number] => 07799649
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[patent_title] => 'Method for forming multi gate devices using a silicon oxide masking layer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/279602 | Method for forming multi gate devices using a silicon oxide masking layer | Apr 12, 2006 | Issued |
Array
(
[id] => 5342876
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[patent_title] => 'Plasma Doping Method and Apparatus'
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[patent_app_number] => 11/887381
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/887381 | Plasma Doping Method and Apparatus | Mar 29, 2006 | Abandoned |
Array
(
[id] => 5733013
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[patent_title] => 'Method for patterning a semiconductor component'
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Array
(
[id] => 7692041
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[patent_title] => 'Method of removing residue from a substrate'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/390192 | Method of removing residue from a substrate | Mar 27, 2006 | Issued |
Array
(
[id] => 452864
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[patent_title] => 'Method for producing magnetic memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/389281 | Method for producing magnetic memory device | Mar 26, 2006 | Issued |
Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/365291 | Termination for SiC trench devices | Feb 28, 2006 | Issued |