Search

Peter J. Macchiarolo

Supervisory Patent Examiner (ID: 6406, Phone: (571)272-2375 , Office: P/2856 )

Most Active Art Unit
2879
Art Unit(s)
2856, 2875, 2855, 2879
Total Applications
714
Issued Applications
485
Pending Applications
22
Abandoned Applications
212

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 907099 [patent_doc_number] => 07332403 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-02-19 [patent_title] => 'System and method for providing a buried thin film resistor having end caps defined by a dielectric mask' [patent_app_type] => utility [patent_app_number] => 11/179022 [patent_app_country] => US [patent_app_date] => 2005-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 22 [patent_no_of_words] => 5001 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/332/07332403.pdf [firstpage_image] =>[orig_patent_app_number] => 11179022 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/179022
System and method for providing a buried thin film resistor having end caps defined by a dielectric mask Jul 10, 2005 Issued
Array ( [id] => 5602360 [patent_doc_number] => 20060292705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Method and process for fabricating read sensors for read-write heads in mass storage devices' [patent_app_type] => utility [patent_app_number] => 11/166322 [patent_app_country] => US [patent_app_date] => 2005-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5822 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0292/20060292705.pdf [firstpage_image] =>[orig_patent_app_number] => 11166322 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/166322
Method and process for fabricating read sensors for read-write heads in mass storage devices Jun 23, 2005 Abandoned
Array ( [id] => 334209 [patent_doc_number] => 07507620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-24 [patent_title] => 'Low-capacity vertical diode' [patent_app_type] => utility [patent_app_number] => 11/159991 [patent_app_country] => US [patent_app_date] => 2005-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2469 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/507/07507620.pdf [firstpage_image] =>[orig_patent_app_number] => 11159991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/159991
Low-capacity vertical diode Jun 22, 2005 Issued
Array ( [id] => 826791 [patent_doc_number] => 07402455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-22 [patent_title] => 'Manufacturing method of a contact structure and phase change memory cell with elimination of double contacts' [patent_app_type] => utility [patent_app_number] => 11/156989 [patent_app_country] => US [patent_app_date] => 2005-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 33 [patent_no_of_words] => 5581 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/402/07402455.pdf [firstpage_image] =>[orig_patent_app_number] => 11156989 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/156989
Manufacturing method of a contact structure and phase change memory cell with elimination of double contacts Jun 19, 2005 Issued
Array ( [id] => 5631764 [patent_doc_number] => 20060148234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Non-via method of connecting magnetoelectric elements with conductive line' [patent_app_type] => utility [patent_app_number] => 11/154632 [patent_app_country] => US [patent_app_date] => 2005-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2077 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20060148234.pdf [firstpage_image] =>[orig_patent_app_number] => 11154632 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/154632
Non-via method of connecting magnetoelectric elements with conductive line Jun 16, 2005 Abandoned
Array ( [id] => 5688426 [patent_doc_number] => 20060286741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Methods of fabricating high voltage devices' [patent_app_type] => utility [patent_app_number] => 11/154431 [patent_app_country] => US [patent_app_date] => 2005-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5654 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20060286741.pdf [firstpage_image] =>[orig_patent_app_number] => 11154431 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/154431
Methods of fabricating high voltage devices Jun 15, 2005 Issued
Array ( [id] => 910073 [patent_doc_number] => 07329574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-12 [patent_title] => 'Methods of forming capacitor electrodes using fluorine and oxygen' [patent_app_type] => utility [patent_app_number] => 11/154152 [patent_app_country] => US [patent_app_date] => 2005-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5134 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/329/07329574.pdf [firstpage_image] =>[orig_patent_app_number] => 11154152 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/154152
Methods of forming capacitor electrodes using fluorine and oxygen Jun 15, 2005 Issued
Array ( [id] => 6966639 [patent_doc_number] => 20050233536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Method for the production of a bipolar transistor' [patent_app_type] => utility [patent_app_number] => 11/153062 [patent_app_country] => US [patent_app_date] => 2005-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4494 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20050233536.pdf [firstpage_image] =>[orig_patent_app_number] => 11153062 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/153062
Method for the production of a bipolar transistor Jun 14, 2005 Issued
Array ( [id] => 5793641 [patent_doc_number] => 20060014322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Methods and apparatuses relating to block configurations and fluidic self-assembly processes' [patent_app_type] => utility [patent_app_number] => 11/153037 [patent_app_country] => US [patent_app_date] => 2005-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11408 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20060014322.pdf [firstpage_image] =>[orig_patent_app_number] => 11153037 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/153037
Methods and apparatuses relating to block configurations and fluidic self-assembly processes Jun 13, 2005 Abandoned
Array ( [id] => 5889226 [patent_doc_number] => 20060276034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Forming via contacts in MRAM cells' [patent_app_type] => utility [patent_app_number] => 11/145180 [patent_app_country] => US [patent_app_date] => 2005-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2649 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20060276034.pdf [firstpage_image] =>[orig_patent_app_number] => 11145180 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/145180
Forming via contacts in MRAM cells Jun 5, 2005 Abandoned
Array ( [id] => 634081 [patent_doc_number] => 07129137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-31 [patent_title] => 'Method of manufacturing semiconductor device having multiple gate oxide films' [patent_app_type] => utility [patent_app_number] => 11/138481 [patent_app_country] => US [patent_app_date] => 2005-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 30 [patent_no_of_words] => 4015 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/129/07129137.pdf [firstpage_image] =>[orig_patent_app_number] => 11138481 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/138481
Method of manufacturing semiconductor device having multiple gate oxide films May 26, 2005 Issued
Array ( [id] => 9375672 [patent_doc_number] => 08679936 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-25 [patent_title] => 'Manufacturing resistors with tightened resistivity distribution in semiconductor integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/138031 [patent_app_country] => US [patent_app_date] => 2005-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 2426 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11138031 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/138031
Manufacturing resistors with tightened resistivity distribution in semiconductor integrated circuits May 25, 2005 Issued
Array ( [id] => 5776887 [patent_doc_number] => 20060105527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 11/137512 [patent_app_country] => US [patent_app_date] => 2005-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 6291 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20060105527.pdf [firstpage_image] =>[orig_patent_app_number] => 11137512 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/137512
Semiconductor device and manufacturing method therefor May 25, 2005 Abandoned
Array ( [id] => 5637578 [patent_doc_number] => 20060068551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Method for embedding NROM' [patent_app_type] => utility [patent_app_number] => 11/137042 [patent_app_country] => US [patent_app_date] => 2005-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3047 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20060068551.pdf [firstpage_image] =>[orig_patent_app_number] => 11137042 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/137042
Method for embedding NROM May 24, 2005 Abandoned
Array ( [id] => 7109761 [patent_doc_number] => 20050207215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Methods of forming memory circuitry' [patent_app_type] => utility [patent_app_number] => 11/135534 [patent_app_country] => US [patent_app_date] => 2005-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 2857 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20050207215.pdf [firstpage_image] =>[orig_patent_app_number] => 11135534 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/135534
Methods of forming memory circuitry May 22, 2005 Issued
Array ( [id] => 489241 [patent_doc_number] => 07214559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'Method for fabricating vertical offset structure' [patent_app_type] => utility [patent_app_number] => 11/134521 [patent_app_country] => US [patent_app_date] => 2005-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 3489 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/214/07214559.pdf [firstpage_image] =>[orig_patent_app_number] => 11134521 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/134521
Method for fabricating vertical offset structure May 22, 2005 Issued
Array ( [id] => 7109763 [patent_doc_number] => 20050207217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Layered magnetic structures having improved surface planarity for bit material deposition' [patent_app_type] => utility [patent_app_number] => 11/134321 [patent_app_country] => US [patent_app_date] => 2005-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4606 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20050207217.pdf [firstpage_image] =>[orig_patent_app_number] => 11134321 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/134321
Layered magnetic structures having improved surface planarity for bit material deposition May 22, 2005 Issued
Array ( [id] => 6957514 [patent_doc_number] => 20050213884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Method for fabricating a tapered optical coupling into a slab waveguide' [patent_app_type] => utility [patent_app_number] => 11/134008 [patent_app_country] => US [patent_app_date] => 2005-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3621 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20050213884.pdf [firstpage_image] =>[orig_patent_app_number] => 11134008 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/134008
Method for fabricating a tapered optical coupling into a slab waveguide May 19, 2005 Issued
Array ( [id] => 732631 [patent_doc_number] => 07037790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Independently accessed double-gate and tri-gate transistors in same process flow' [patent_app_type] => utility [patent_app_number] => 11/124572 [patent_app_country] => US [patent_app_date] => 2005-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 4112 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/037/07037790.pdf [firstpage_image] =>[orig_patent_app_number] => 11124572 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/124572
Independently accessed double-gate and tri-gate transistors in same process flow May 3, 2005 Issued
Array ( [id] => 5820581 [patent_doc_number] => 20060024894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Capacitor in semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/114102 [patent_app_country] => US [patent_app_date] => 2005-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3122 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20060024894.pdf [firstpage_image] =>[orig_patent_app_number] => 11114102 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/114102
Capacitor in semiconductor device and method for fabricating the same Apr 25, 2005 Issued
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