Search

Peter J. Macchiarolo

Supervisory Patent Examiner (ID: 6406, Phone: (571)272-2375 , Office: P/2856 )

Most Active Art Unit
2879
Art Unit(s)
2856, 2875, 2855, 2879
Total Applications
714
Issued Applications
485
Pending Applications
22
Abandoned Applications
212

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7144239 [patent_doc_number] => 20050118778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'METAL-INSULATOR-METAL (MIM) CAPACITOR AND FABRICATION METHOD FOR MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 10/905472 [patent_app_country] => US [patent_app_date] => 2005-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2639 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20050118778.pdf [firstpage_image] =>[orig_patent_app_number] => 10905472 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/905472
Metal-insulator-metal (MIM) capacitor and fabrication method for making the same Jan 5, 2005 Issued
Array ( [id] => 5631726 [patent_doc_number] => 20060148196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'SEMICONDUCTOR FABRICATION PROCESS INCLUDING RECESSED SOURCE/DRAIN REGIONS IN AN SOI WAFER' [patent_app_type] => utility [patent_app_number] => 11/028811 [patent_app_country] => US [patent_app_date] => 2005-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2936 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20060148196.pdf [firstpage_image] =>[orig_patent_app_number] => 11028811 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/028811
Semiconductor fabrication process including recessed source/drain regions in an SOI wafer Jan 2, 2005 Issued
Array ( [id] => 7253299 [patent_doc_number] => 20050142735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Method of fabricating MOS transistor' [patent_app_type] => utility [patent_app_number] => 11/024792 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2478 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20050142735.pdf [firstpage_image] =>[orig_patent_app_number] => 11024792 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/024792
Method of fabricating MOS transistor Dec 29, 2004 Issued
Array ( [id] => 6926025 [patent_doc_number] => 20050239280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/024731 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1702 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20050239280.pdf [firstpage_image] =>[orig_patent_app_number] => 11024731 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/024731
Method of manufacturing semiconductor device Dec 29, 2004 Issued
Array ( [id] => 7253281 [patent_doc_number] => 20050142727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Methods of forming silicide layer of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/026611 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2547 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20050142727.pdf [firstpage_image] =>[orig_patent_app_number] => 11026611 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/026611
Methods of forming silicide layer of semiconductor device Dec 29, 2004 Issued
Array ( [id] => 872030 [patent_doc_number] => 07361547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'Method for forming a capacitor for use in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/024981 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4090 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/361/07361547.pdf [firstpage_image] =>[orig_patent_app_number] => 11024981 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/024981
Method for forming a capacitor for use in a semiconductor device Dec 29, 2004 Issued
Array ( [id] => 7005270 [patent_doc_number] => 20050170583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Methods of fabricating MIM capacitors of semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/027312 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2074 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20050170583.pdf [firstpage_image] =>[orig_patent_app_number] => 11027312 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/027312
Methods of fabricating MIM capacitors of semiconductor devices Dec 29, 2004 Issued
Array ( [id] => 7235879 [patent_doc_number] => 20050139888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Semiconductor device and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 11/027852 [patent_app_country] => US [patent_app_date] => 2004-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1863 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20050139888.pdf [firstpage_image] =>[orig_patent_app_number] => 11027852 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/027852
Semiconductor device and fabricating method thereof Dec 28, 2004 Abandoned
Array ( [id] => 7253282 [patent_doc_number] => 20050142728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Methods of forming wells in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/025121 [patent_app_country] => US [patent_app_date] => 2004-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 1477 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20050142728.pdf [firstpage_image] =>[orig_patent_app_number] => 11025121 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/025121
Methods of forming wells in semiconductor devices Dec 27, 2004 Issued
Array ( [id] => 7197157 [patent_doc_number] => 20050164456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'Method for fabricating an NROM memory cell array' [patent_app_type] => utility [patent_app_number] => 11/023041 [patent_app_country] => US [patent_app_date] => 2004-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4292 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20050164456.pdf [firstpage_image] =>[orig_patent_app_number] => 11023041 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/023041
Method for fabricating an NROM memory cell array Dec 26, 2004 Issued
Array ( [id] => 7104079 [patent_doc_number] => 20050106805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'High value split poly P-resistor with low standard deviation' [patent_app_type] => utility [patent_app_number] => 11/018041 [patent_app_country] => US [patent_app_date] => 2004-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2608 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20050106805.pdf [firstpage_image] =>[orig_patent_app_number] => 11018041 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/018041
High value split poly P-resistor with low standard deviation Dec 20, 2004 Issued
11/016411 Electrical energy storage devices with separator between electrodes and methods for fabricating the devices Dec 16, 2004 Abandoned
Array ( [id] => 7101404 [patent_doc_number] => 20050104130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'High-density split-gate FinFET' [patent_app_type] => utility [patent_app_number] => 11/012801 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20050104130.pdf [firstpage_image] =>[orig_patent_app_number] => 11012801 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/012801
High-density split-gate FinFET Dec 15, 2004 Issued
Array ( [id] => 645196 [patent_doc_number] => 07118955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure' [patent_app_type] => utility [patent_app_number] => 11/010941 [patent_app_country] => US [patent_app_date] => 2004-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2428 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/118/07118955.pdf [firstpage_image] =>[orig_patent_app_number] => 11010941 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/010941
Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure Dec 9, 2004 Issued
Array ( [id] => 4648692 [patent_doc_number] => 20080035947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'Surface Mount Light Emitting Chip Package' [patent_app_type] => utility [patent_app_number] => 10/582377 [patent_app_country] => US [patent_app_date] => 2004-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4056 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20080035947.pdf [firstpage_image] =>[orig_patent_app_number] => 10582377 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/582377
Surface Mount Light Emitting Chip Package Dec 8, 2004 Abandoned
Array ( [id] => 7154409 [patent_doc_number] => 20050082615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'Epitaxial ferroelectric thin-film device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/002798 [patent_app_country] => US [patent_app_date] => 2004-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7663 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20050082615.pdf [firstpage_image] =>[orig_patent_app_number] => 11002798 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/002798
Epitaxial ferroelectric thin-film device and method of manufacturing the same Dec 2, 2004 Abandoned
Array ( [id] => 5894931 [patent_doc_number] => 20060003470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Phase-change random access memory device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/999545 [patent_app_country] => US [patent_app_date] => 2004-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4039 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20060003470.pdf [firstpage_image] =>[orig_patent_app_number] => 10999545 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/999545
Phase-change random access memory device and method for manufacturing the same Nov 29, 2004 Abandoned
Array ( [id] => 452975 [patent_doc_number] => 07247537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-24 [patent_title] => 'Semiconductor device including an improved capacitor and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/000782 [patent_app_country] => US [patent_app_date] => 2004-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 8718 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/247/07247537.pdf [firstpage_image] =>[orig_patent_app_number] => 11000782 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/000782
Semiconductor device including an improved capacitor and method for manufacturing the same Nov 29, 2004 Issued
Array ( [id] => 330447 [patent_doc_number] => 07510942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-31 [patent_title] => 'Molecular modifications of metal/dielectric interfaces' [patent_app_type] => utility [patent_app_number] => 10/997641 [patent_app_country] => US [patent_app_date] => 2004-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4031 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/510/07510942.pdf [firstpage_image] =>[orig_patent_app_number] => 10997641 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/997641
Molecular modifications of metal/dielectric interfaces Nov 23, 2004 Issued
Array ( [id] => 6983443 [patent_doc_number] => 20050153513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Method of forming a dielectric layer for a non-volatile memory cell and method of forming a non-volatile memory cell having the dielectric layer' [patent_app_type] => utility [patent_app_number] => 10/992841 [patent_app_country] => US [patent_app_date] => 2004-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2726 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20050153513.pdf [firstpage_image] =>[orig_patent_app_number] => 10992841 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/992841
Method of forming a dielectric layer for a non-volatile memory cell and method of forming a non-volatile memory cell having the dielectric layer Nov 21, 2004 Abandoned
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