
Peter J. Macchiarolo
Supervisory Patent Examiner (ID: 6406, Phone: (571)272-2375 , Office: P/2856 )
| Most Active Art Unit | 2879 |
| Art Unit(s) | 2856, 2875, 2855, 2879 |
| Total Applications | 714 |
| Issued Applications | 485 |
| Pending Applications | 22 |
| Abandoned Applications | 212 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7144239
[patent_doc_number] => 20050118778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-02
[patent_title] => 'METAL-INSULATOR-METAL (MIM) CAPACITOR AND FABRICATION METHOD FOR MAKING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 10/905472
[patent_app_country] => US
[patent_app_date] => 2005-01-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0118/20050118778.pdf
[firstpage_image] =>[orig_patent_app_number] => 10905472
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/905472 | Metal-insulator-metal (MIM) capacitor and fabrication method for making the same | Jan 5, 2005 | Issued |
Array
(
[id] => 5631726
[patent_doc_number] => 20060148196
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'SEMICONDUCTOR FABRICATION PROCESS INCLUDING RECESSED SOURCE/DRAIN REGIONS IN AN SOI WAFER'
[patent_app_type] => utility
[patent_app_number] => 11/028811
[patent_app_country] => US
[patent_app_date] => 2005-01-03
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11028811
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/028811 | Semiconductor fabrication process including recessed source/drain regions in an SOI wafer | Jan 2, 2005 | Issued |
Array
(
[id] => 7253299
[patent_doc_number] => 20050142735
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'Method of fabricating MOS transistor'
[patent_app_type] => utility
[patent_app_number] => 11/024792
[patent_app_country] => US
[patent_app_date] => 2004-12-30
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11024792
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/024792 | Method of fabricating MOS transistor | Dec 29, 2004 | Issued |
Array
(
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[patent_doc_number] => 20050239280
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[patent_kind] => A1
[patent_issue_date] => 2005-10-27
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/024731
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[firstpage_image] =>[orig_patent_app_number] => 11024731
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/024731 | Method of manufacturing semiconductor device | Dec 29, 2004 | Issued |
Array
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[patent_issue_date] => 2005-06-30
[patent_title] => 'Methods of forming silicide layer of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/026611
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11026611
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/026611 | Methods of forming silicide layer of semiconductor device | Dec 29, 2004 | Issued |
Array
(
[id] => 872030
[patent_doc_number] => 07361547
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[patent_issue_date] => 2008-04-22
[patent_title] => 'Method for forming a capacitor for use in a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/024981
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[firstpage_image] =>[orig_patent_app_number] => 11024981
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/024981 | Method for forming a capacitor for use in a semiconductor device | Dec 29, 2004 | Issued |
Array
(
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[patent_title] => 'Methods of fabricating MIM capacitors of semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 11/027312
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/027312 | Methods of fabricating MIM capacitors of semiconductor devices | Dec 29, 2004 | Issued |
Array
(
[id] => 7235879
[patent_doc_number] => 20050139888
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[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'Semiconductor device and fabricating method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/027852
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11027852
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/027852 | Semiconductor device and fabricating method thereof | Dec 28, 2004 | Abandoned |
Array
(
[id] => 7253282
[patent_doc_number] => 20050142728
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[patent_issue_date] => 2005-06-30
[patent_title] => 'Methods of forming wells in semiconductor devices'
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[patent_app_number] => 11/025121
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/025121 | Methods of forming wells in semiconductor devices | Dec 27, 2004 | Issued |
Array
(
[id] => 7197157
[patent_doc_number] => 20050164456
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-28
[patent_title] => 'Method for fabricating an NROM memory cell array'
[patent_app_type] => utility
[patent_app_number] => 11/023041
[patent_app_country] => US
[patent_app_date] => 2004-12-27
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[pdf_file] => publications/A1/0164/20050164456.pdf
[firstpage_image] =>[orig_patent_app_number] => 11023041
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/023041 | Method for fabricating an NROM memory cell array | Dec 26, 2004 | Issued |
Array
(
[id] => 7104079
[patent_doc_number] => 20050106805
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[patent_title] => 'High value split poly P-resistor with low standard deviation'
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[patent_app_number] => 11/018041
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/018041 | High value split poly P-resistor with low standard deviation | Dec 20, 2004 | Issued |
| 11/016411 | Electrical energy storage devices with separator between electrodes and methods for fabricating the devices | Dec 16, 2004 | Abandoned |
Array
(
[id] => 7101404
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[patent_title] => 'High-density split-gate FinFET'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/012801 | High-density split-gate FinFET | Dec 15, 2004 | Issued |
Array
(
[id] => 645196
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[patent_title] => 'Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure'
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Array
(
[id] => 4648692
[patent_doc_number] => 20080035947
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[patent_issue_date] => 2008-02-14
[patent_title] => 'Surface Mount Light Emitting Chip Package'
[patent_app_type] => utility
[patent_app_number] => 10/582377
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[firstpage_image] =>[orig_patent_app_number] => 10582377
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/582377 | Surface Mount Light Emitting Chip Package | Dec 8, 2004 | Abandoned |
Array
(
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Array
(
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/997641 | Molecular modifications of metal/dielectric interfaces | Nov 23, 2004 | Issued |
Array
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[patent_title] => 'Method of forming a dielectric layer for a non-volatile memory cell and method of forming a non-volatile memory cell having the dielectric layer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/992841 | Method of forming a dielectric layer for a non-volatile memory cell and method of forming a non-volatile memory cell having the dielectric layer | Nov 21, 2004 | Abandoned |