
Peter J. Macchiarolo
Supervisory Patent Examiner (ID: 6406, Phone: (571)272-2375 , Office: P/2856 )
| Most Active Art Unit | 2879 |
| Art Unit(s) | 2856, 2875, 2855, 2879 |
| Total Applications | 714 |
| Issued Applications | 485 |
| Pending Applications | 22 |
| Abandoned Applications | 212 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8280177
[patent_doc_number] => 20120174050
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'METAL DENSITY AWARE SIGNAL ROUTING'
[patent_app_type] => utility
[patent_app_number] => 13/415372
[patent_app_country] => US
[patent_app_date] => 2012-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6658
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13415372
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/415372 | Metal density aware signal routing | Mar 7, 2012 | Issued |
Array
(
[id] => 10893359
[patent_doc_number] => 08916974
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-23
[patent_title] => 'Metal density aware signal routing'
[patent_app_type] => utility
[patent_app_number] => 13/415532
[patent_app_country] => US
[patent_app_date] => 2012-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 6658
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13415532
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/415532 | Metal density aware signal routing | Mar 7, 2012 | Issued |
Array
(
[id] => 10577028
[patent_doc_number] => 09299678
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-29
[patent_title] => 'Semiconductor package and manufacturing method therefor'
[patent_app_type] => utility
[patent_app_number] => 13/326502
[patent_app_country] => US
[patent_app_date] => 2011-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 37
[patent_no_of_words] => 10787
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13326502
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/326502 | Semiconductor package and manufacturing method therefor | Dec 14, 2011 | Issued |
Array
(
[id] => 8742649
[patent_doc_number] => 20130082366
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-04
[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/325401
[patent_app_country] => US
[patent_app_date] => 2011-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4277
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13325401
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/325401 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME | Dec 13, 2011 | Abandoned |
Array
(
[id] => 10531294
[patent_doc_number] => 09257436
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-09
[patent_title] => 'Semiconductor device with buried gates and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/325552
[patent_app_country] => US
[patent_app_date] => 2011-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3710
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13325552
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/325552 | Semiconductor device with buried gates and fabrication method thereof | Dec 13, 2011 | Issued |
Array
(
[id] => 9511504
[patent_doc_number] => 20140147996
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-29
[patent_title] => 'METHODS FOR FABRICATING BULK HETEROJUNCTIONS USING SOLUTION PROCESSING TECHNIQUES'
[patent_app_type] => utility
[patent_app_number] => 13/989683
[patent_app_country] => US
[patent_app_date] => 2011-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6676
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13989683
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/989683 | METHODS FOR FABRICATING BULK HETEROJUNCTIONS USING SOLUTION PROCESSING TECHNIQUES | Nov 27, 2011 | Abandoned |
Array
(
[id] => 11787481
[patent_doc_number] => 09396941
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-07-19
[patent_title] => 'Method for vertical and lateral control of III-N polarity'
[patent_app_type] => utility
[patent_app_number] => 13/235624
[patent_app_country] => US
[patent_app_date] => 2011-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 7627
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13235624
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/235624 | Method for vertical and lateral control of III-N polarity | Sep 18, 2011 | Issued |
Array
(
[id] => 10525580
[patent_doc_number] => 09252099
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-02
[patent_title] => 'Semiconductor device having multilayer wiring structure and manufacturing method of the same'
[patent_app_type] => utility
[patent_app_number] => 13/235782
[patent_app_country] => US
[patent_app_date] => 2011-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 6677
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13235782
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/235782 | Semiconductor device having multilayer wiring structure and manufacturing method of the same | Sep 18, 2011 | Issued |
Array
(
[id] => 10016046
[patent_doc_number] => 09059067
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-16
[patent_title] => 'Semiconductor device with interposer and method manufacturing same'
[patent_app_type] => utility
[patent_app_number] => 13/235546
[patent_app_country] => US
[patent_app_date] => 2011-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 34
[patent_no_of_words] => 9601
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13235546
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/235546 | Semiconductor device with interposer and method manufacturing same | Sep 18, 2011 | Issued |
Array
(
[id] => 8036955
[patent_doc_number] => 20120068214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-22
[patent_title] => 'OPTOELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/235797
[patent_app_country] => US
[patent_app_date] => 2011-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4225
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0068/20120068214.pdf
[firstpage_image] =>[orig_patent_app_number] => 13235797
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/235797 | OPTOELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME | Sep 18, 2011 | Abandoned |
Array
(
[id] => 10079850
[patent_doc_number] => 09117703
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-25
[patent_title] => 'Liquid crystal display device'
[patent_app_type] => utility
[patent_app_number] => 13/235634
[patent_app_country] => US
[patent_app_date] => 2011-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 9363
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 230
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13235634
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/235634 | Liquid crystal display device | Sep 18, 2011 | Issued |
Array
(
[id] => 7506834
[patent_doc_number] => 20110254163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-10-20
[patent_title] => 'SLEEVE INSULATORS AND SEMICONDUCTOR DEVICE INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/170991
[patent_app_country] => US
[patent_app_date] => 2011-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5397
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0254/20110254163.pdf
[firstpage_image] =>[orig_patent_app_number] => 13170991
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/170991 | Sleeve insulators and semiconductor device including the same | Jun 27, 2011 | Issued |
Array
(
[id] => 7791042
[patent_doc_number] => 20120052598
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-01
[patent_title] => 'METHOD FOR THE REALIZATION OF A CROSSBAR ARRAY OF CROSSED CONDUCTIVE OR SEMI-CONDUCTIVE ACCESS LINES'
[patent_app_type] => utility
[patent_app_number] => 13/154726
[patent_app_country] => US
[patent_app_date] => 2011-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6644
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20120052598.pdf
[firstpage_image] =>[orig_patent_app_number] => 13154726
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/154726 | Method for the realization of a crossbar array of crossed conductive or semi-conductive access lines | Jun 6, 2011 | Issued |
Array
(
[id] => 10844384
[patent_doc_number] => 08871559
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-28
[patent_title] => 'Methods for fabricating phase change memory devices'
[patent_app_type] => utility
[patent_app_number] => 13/154631
[patent_app_country] => US
[patent_app_date] => 2011-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 65
[patent_figures_cnt] => 104
[patent_no_of_words] => 14142
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13154631
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/154631 | Methods for fabricating phase change memory devices | Jun 6, 2011 | Issued |
Array
(
[id] => 8516345
[patent_doc_number] => 20120315753
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-13
[patent_title] => 'METHOD OF FORMING A THROUGH-SILICON VIA UTILIZING A METAL CONTACT PAD IN A BACK-END-OF-LINE WIRING LEVEL TO FILL THE THROUGH-SILICON VIA'
[patent_app_type] => utility
[patent_app_number] => 13/154905
[patent_app_country] => US
[patent_app_date] => 2011-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 6735
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13154905
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/154905 | Method of forming a through-silicon via utilizing a metal contact pad in a back-end-of-line wiring level to fill the through-silicon via | Jun 6, 2011 | Issued |
Array
(
[id] => 7510946
[patent_doc_number] => 20110256656
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-10-20
[patent_title] => 'Chemical Bath Deposition Apparatus for Fabrication of Semiconductor Films through Roll-to-Roll Processes'
[patent_app_type] => utility
[patent_app_number] => 13/154481
[patent_app_country] => US
[patent_app_date] => 2011-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4806
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0256/20110256656.pdf
[firstpage_image] =>[orig_patent_app_number] => 13154481
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/154481 | Chemical bath deposition apparatus for fabrication of semiconductor films through roll-to-roll processes | Jun 6, 2011 | Issued |
Array
(
[id] => 8480988
[patent_doc_number] => 20120280395
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-08
[patent_title] => '3-D Integration using Multi Stage Vias'
[patent_app_type] => utility
[patent_app_number] => 13/101268
[patent_app_country] => US
[patent_app_date] => 2011-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4152
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13101268
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/101268 | 3-D integration using multi stage vias | May 4, 2011 | Issued |
Array
(
[id] => 8480874
[patent_doc_number] => 20120280281
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-08
[patent_title] => 'GALLIUM NITRIDE OR OTHER GROUP III/V-BASED SCHOTTKY DIODES WITH IMPROVED OPERATING CHARACTERISTICS'
[patent_app_type] => utility
[patent_app_number] => 13/101378
[patent_app_country] => US
[patent_app_date] => 2011-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4941
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13101378
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/101378 | GALLIUM NITRIDE OR OTHER GROUP III/V-BASED SCHOTTKY DIODES WITH IMPROVED OPERATING CHARACTERISTICS | May 4, 2011 | Abandoned |
Array
(
[id] => 9345508
[patent_doc_number] => 08664658
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-04
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/101266
[patent_app_country] => US
[patent_app_date] => 2011-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 37
[patent_no_of_words] => 25724
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13101266
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/101266 | Semiconductor device | May 4, 2011 | Issued |
Array
(
[id] => 9496373
[patent_doc_number] => 08735187
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-27
[patent_title] => 'Array substrate for reflective type or transflective type liquid crystal display device and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 13/100771
[patent_app_country] => US
[patent_app_date] => 2011-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 6084
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13100771
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/100771 | Array substrate for reflective type or transflective type liquid crystal display device and method of fabricating the same | May 3, 2011 | Issued |