Search

Peter J. Reddig

Examiner (ID: 11666, Phone: (571)272-9031 , Office: P/1642 )

Most Active Art Unit
1642
Art Unit(s)
1646, 1642
Total Applications
1301
Issued Applications
615
Pending Applications
149
Abandoned Applications
566

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4014080 [patent_doc_number] => 05987065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Adaptive equalizer' [patent_app_type] => 1 [patent_app_number] => 8/882154 [patent_app_country] => US [patent_app_date] => 1997-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2569 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/987/05987065.pdf [firstpage_image] =>[orig_patent_app_number] => 882154 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/882154
Adaptive equalizer Jun 24, 1997 Issued
Array ( [id] => 4160852 [patent_doc_number] => 06064692 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Protocol for transceiver initialization' [patent_app_type] => 1 [patent_app_number] => 8/879390 [patent_app_country] => US [patent_app_date] => 1997-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7123 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/064/06064692.pdf [firstpage_image] =>[orig_patent_app_number] => 879390 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/879390
Protocol for transceiver initialization Jun 19, 1997 Issued
Array ( [id] => 4087514 [patent_doc_number] => 05966415 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Adaptive equalization in a sub-sampled read channel for a disk storage system' [patent_app_type] => 1 [patent_app_number] => 8/876054 [patent_app_country] => US [patent_app_date] => 1997-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7948 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/966/05966415.pdf [firstpage_image] =>[orig_patent_app_number] => 876054 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/876054
Adaptive equalization in a sub-sampled read channel for a disk storage system Jun 12, 1997 Issued
Array ( [id] => 4097255 [patent_doc_number] => 06018549 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Selectable multi-protocol cable termination' [patent_app_type] => 1 [patent_app_number] => 8/873545 [patent_app_country] => US [patent_app_date] => 1997-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6038 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018549.pdf [firstpage_image] =>[orig_patent_app_number] => 873545 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/873545
Selectable multi-protocol cable termination Jun 11, 1997 Issued
Array ( [id] => 4079065 [patent_doc_number] => 05867525 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'Synchronizer and method therefor and communications system incorporating same' [patent_app_type] => 1 [patent_app_number] => 8/872398 [patent_app_country] => US [patent_app_date] => 1997-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9255 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/867/05867525.pdf [firstpage_image] =>[orig_patent_app_number] => 872398 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/872398
Synchronizer and method therefor and communications system incorporating same Jun 9, 1997 Issued
Array ( [id] => 3949811 [patent_doc_number] => 05872813 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Dual differential and binary data receiver arrangement' [patent_app_type] => 1 [patent_app_number] => 8/867377 [patent_app_country] => US [patent_app_date] => 1997-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4757 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872813.pdf [firstpage_image] =>[orig_patent_app_number] => 867377 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/867377
Dual differential and binary data receiver arrangement Jun 1, 1997 Issued
Array ( [id] => 3941462 [patent_doc_number] => 05878097 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Signal processing delay circuit' [patent_app_type] => 1 [patent_app_number] => 8/865704 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 7451 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/878/05878097.pdf [firstpage_image] =>[orig_patent_app_number] => 865704 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/865704
Signal processing delay circuit May 29, 1997 Issued
Array ( [id] => 3995491 [patent_doc_number] => 05949822 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Encoding/decoding scheme for communication of low latency data for the subcarrier traffic information channel' [patent_app_type] => 1 [patent_app_number] => 8/866075 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7431 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/949/05949822.pdf [firstpage_image] =>[orig_patent_app_number] => 866075 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/866075
Encoding/decoding scheme for communication of low latency data for the subcarrier traffic information channel May 29, 1997 Issued
Array ( [id] => 3971875 [patent_doc_number] => 05937006 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Frequency translating device transmission response method' [patent_app_type] => 1 [patent_app_number] => 8/865276 [patent_app_country] => US [patent_app_date] => 1997-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 19358 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/937/05937006.pdf [firstpage_image] =>[orig_patent_app_number] => 865276 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/865276
Frequency translating device transmission response method May 27, 1997 Issued
Array ( [id] => 4247455 [patent_doc_number] => 06075820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Sampling receiver with multi-branch sigma-delta modulators and digital channel mismatch correction' [patent_app_type] => 1 [patent_app_number] => 8/864046 [patent_app_country] => US [patent_app_date] => 1997-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4153 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075820.pdf [firstpage_image] =>[orig_patent_app_number] => 864046 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/864046
Sampling receiver with multi-branch sigma-delta modulators and digital channel mismatch correction May 27, 1997 Issued
Array ( [id] => 4252115 [patent_doc_number] => 06081557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Datalink system and communication network' [patent_app_type] => 1 [patent_app_number] => 8/857807 [patent_app_country] => US [patent_app_date] => 1997-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5777 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081557.pdf [firstpage_image] =>[orig_patent_app_number] => 857807 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/857807
Datalink system and communication network May 15, 1997 Issued
Array ( [id] => 3959598 [patent_doc_number] => 05982827 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Means for virtual deskewing of high/intermediate/low DUT data' [patent_app_type] => 1 [patent_app_number] => 8/855976 [patent_app_country] => US [patent_app_date] => 1997-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5706 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/982/05982827.pdf [firstpage_image] =>[orig_patent_app_number] => 855976 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/855976
Means for virtual deskewing of high/intermediate/low DUT data May 13, 1997 Issued
Array ( [id] => 3941717 [patent_doc_number] => 05953365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Interference-tolerant spread-spectrum receiver and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/853157 [patent_app_country] => US [patent_app_date] => 1997-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4872 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953365.pdf [firstpage_image] =>[orig_patent_app_number] => 853157 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/853157
Interference-tolerant spread-spectrum receiver and method therefor May 7, 1997 Issued
Array ( [id] => 3972066 [patent_doc_number] => 05937021 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Digital phase-locked loop for clock recovery' [patent_app_type] => 1 [patent_app_number] => 8/848742 [patent_app_country] => US [patent_app_date] => 1997-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3901 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/937/05937021.pdf [firstpage_image] =>[orig_patent_app_number] => 848742 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/848742
Digital phase-locked loop for clock recovery Apr 30, 1997 Issued
Array ( [id] => 4110020 [patent_doc_number] => 06049561 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Radio frequency communication system' [patent_app_type] => 1 [patent_app_number] => 8/848846 [patent_app_country] => US [patent_app_date] => 1997-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 8787 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049561.pdf [firstpage_image] =>[orig_patent_app_number] => 848846 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/848846
Radio frequency communication system Apr 29, 1997 Issued
Array ( [id] => 4040255 [patent_doc_number] => 05903610 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Method and apparatus for channel estimation' [patent_app_type] => 1 [patent_app_number] => 8/836056 [patent_app_country] => US [patent_app_date] => 1997-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3359 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903610.pdf [firstpage_image] =>[orig_patent_app_number] => 836056 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/836056
Method and apparatus for channel estimation Apr 28, 1997 Issued
Array ( [id] => 4253867 [patent_doc_number] => 06091783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'High speed digital data transmission by separately clocking and recombining interleaved data subgroups' [patent_app_type] => 1 [patent_app_number] => 8/846517 [patent_app_country] => US [patent_app_date] => 1997-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4509 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/091/06091783.pdf [firstpage_image] =>[orig_patent_app_number] => 846517 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/846517
High speed digital data transmission by separately clocking and recombining interleaved data subgroups Apr 24, 1997 Issued
Array ( [id] => 4235500 [patent_doc_number] => 06011822 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Differential charge pump based phase locked loop or delay locked loop' [patent_app_type] => 1 [patent_app_number] => 8/843936 [patent_app_country] => US [patent_app_date] => 1997-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 9077 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011822.pdf [firstpage_image] =>[orig_patent_app_number] => 843936 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/843936
Differential charge pump based phase locked loop or delay locked loop Apr 16, 1997 Issued
Array ( [id] => 4370459 [patent_doc_number] => 06169772 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Stretching setup and hold times in synchronous designs' [patent_app_type] => 1 [patent_app_number] => 9/314857 [patent_app_country] => US [patent_app_date] => 1997-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2242 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169772.pdf [firstpage_image] =>[orig_patent_app_number] => 314857 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/314857
Stretching setup and hold times in synchronous designs Apr 16, 1997 Issued
Array ( [id] => 1428327 [patent_doc_number] => 06522696 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Adaptive frequency correction in a wireless communications system, such as for GSM and IS54' [patent_app_type] => B1 [patent_app_number] => 08/832719 [patent_app_country] => US [patent_app_date] => 1997-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7351 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/522/06522696.pdf [firstpage_image] =>[orig_patent_app_number] => 08832719 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/832719
Adaptive frequency correction in a wireless communications system, such as for GSM and IS54 Apr 10, 1997 Issued
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