Search

Peter M. Albrecht

Examiner (ID: 4457, Phone: (571)272-7813 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
606
Issued Applications
384
Pending Applications
89
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19703260 [patent_doc_number] => 12197284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Data storage device and method for using zones of memory in a read scrub operation [patent_app_type] => utility [patent_app_number] => 18/222044 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18222044 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/222044
Data storage device and method for using zones of memory in a read scrub operation Jul 13, 2023 Issued
Array ( [id] => 18927935 [patent_doc_number] => 20240030939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => METHOD AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM AND APPARATUS FOR DECODING LOW-DENSITY PARITY-CHECK (LDPC) CODE [patent_app_type] => utility [patent_app_number] => 18/220464 [patent_app_country] => US [patent_app_date] => 2023-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18220464 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/220464
Method and non-transitory computer-readable storage medium and apparatus for decoding low-density parity-check (LDPC) code Jul 10, 2023 Issued
Array ( [id] => 19251080 [patent_doc_number] => 20240202070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => Data storage device and method for performing error recovery [patent_app_type] => utility [patent_app_number] => 18/219087 [patent_app_country] => US [patent_app_date] => 2023-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18219087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/219087
Data storage device and method for performing error recovery Jul 5, 2023 Issued
Array ( [id] => 19645021 [patent_doc_number] => 20240419541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => Low Complexity System and Method for Detection and Correction of Data with additional Metadata from Corruption [patent_app_type] => utility [patent_app_number] => 18/336900 [patent_app_country] => US [patent_app_date] => 2023-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336900 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/336900
Low complexity system and method for detection and correction of data with additional metadata from corruption Jun 15, 2023 Issued
Array ( [id] => 20096993 [patent_doc_number] => 20250226929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => SIGNAL DETECTION METHOD AND DEVICE AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/879279 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18879279 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/879279
SIGNAL DETECTION METHOD AND DEVICE AND STORAGE MEDIUM Jun 13, 2023 Abandoned
Array ( [id] => 20688538 [patent_doc_number] => 12618680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Package on package memory interface and configuration with error code correction [patent_app_type] => utility [patent_app_number] => 18/306510 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18306510 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/306510
Package on package memory interface and configuration with error code correction Apr 24, 2023 Issued
Array ( [id] => 20323258 [patent_doc_number] => 20250335346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => CODECS FOR DNA DATA STORAGE [patent_app_type] => utility [patent_app_number] => 18/858085 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 52442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18858085 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/858085
CODECS FOR DNA DATA STORAGE Apr 19, 2023 Pending
Array ( [id] => 19789181 [patent_doc_number] => 20250062860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => FSK AND LAN PROTOCOL CONVERSION APPARATUS FOR RAIL TRANSIT SIGNAL SYSTEM [patent_app_type] => utility [patent_app_number] => 18/706690 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4325 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18706690 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/706690
FSK AND LAN PROTOCOL CONVERSION APPARATUS FOR RAIL TRANSIT SIGNAL SYSTEM Nov 29, 2022 Pending
Array ( [id] => 20228490 [patent_doc_number] => 12417142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Method of operating memory for having high reliability and memory of implementing the same [patent_app_type] => utility [patent_app_number] => 18/283185 [patent_app_country] => US [patent_app_date] => 2022-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2386 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18283185 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/283185
Method of operating memory for having high reliability and memory of implementing the same Nov 27, 2022 Issued
Array ( [id] => 20330877 [patent_doc_number] => 12461149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Error diagnosis circuit and method for operating a device [patent_app_type] => utility [patent_app_number] => 17/937585 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17937585 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/937585
Error diagnosis circuit and method for operating a device Oct 2, 2022 Issued
Array ( [id] => 19383112 [patent_doc_number] => 20240272982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => QUAD-CHANNEL MEMORY MODULE RELIABILITY [patent_app_type] => utility [patent_app_number] => 18/569503 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18569503 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/569503
QUAD-CHANNEL MEMORY MODULE RELIABILITY Jun 20, 2022 Pending
Array ( [id] => 20229651 [patent_doc_number] => 12418311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Methods, apparatus and systems for reduced complexity polar codes based on modified cyclic-redundancy-check (CRC) procedures [patent_app_type] => utility [patent_app_number] => 18/270633 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 33 [patent_no_of_words] => 24757 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18270633 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/270633
Methods, apparatus and systems for reduced complexity polar codes based on modified cyclic-redundancy-check (CRC) procedures Jan 9, 2022 Issued
Array ( [id] => 19320234 [patent_doc_number] => 20240241778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => IN-SYSTEM MITIGATION OF UNCORRECTABLE ERRORS BASED ON CONFIDENCE FACTORS, BASED ON FAULT-AWARE ANALYSIS [patent_app_type] => utility [patent_app_number] => 18/562237 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18562237 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/562237
IN-SYSTEM MITIGATION OF UNCORRECTABLE ERRORS BASED ON CONFIDENCE FACTORS, BASED ON FAULT-AWARE ANALYSIS Dec 12, 2021 Pending
Array ( [id] => 17347979 [patent_doc_number] => 20220014310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => DECODER AND DECODING METHOD SELECTING AN ERROR CONCEALMENT MODE, AND ENCODER AND ENCODING METHOD [patent_app_type] => utility [patent_app_number] => 17/402202 [patent_app_country] => US [patent_app_date] => 2021-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402202 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/402202
Decoder and decoding method selecting an error concealment mode, and encoder and encoding method Aug 12, 2021 Issued
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