Search

Peter M. Poon

Supervisory Patent Examiner (ID: 9670, Phone: (571)272-6891 , Office: P/3643 )

Most Active Art Unit
3103
Art Unit(s)
3613, 3103, 3643, 3644
Total Applications
884
Issued Applications
571
Pending Applications
66
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14426 [patent_doc_number] => 07808043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-05 [patent_title] => 'Semiconductor device and methods of fabricating the same including forming spacers and etch stop layers with stress properties' [patent_app_type] => utility [patent_app_number] => 11/525024 [patent_app_country] => US [patent_app_date] => 2006-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5584 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/808/07808043.pdf [firstpage_image] =>[orig_patent_app_number] => 11525024 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/525024
Semiconductor device and methods of fabricating the same including forming spacers and etch stop layers with stress properties Sep 21, 2006 Issued
Array ( [id] => 5625556 [patent_doc_number] => 20060264061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Solid source precursor delivery system' [patent_app_type] => utility [patent_app_number] => 11/495436 [patent_app_country] => US [patent_app_date] => 2006-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2959 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20060264061.pdf [firstpage_image] =>[orig_patent_app_number] => 11495436 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/495436
Solid source precursor delivery system Jul 27, 2006 Abandoned
Array ( [id] => 380051 [patent_doc_number] => 07309624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-18 [patent_title] => 'Semiconductor device and method for the fabrication thereof including grinding a major portion of the frame' [patent_app_type] => utility [patent_app_number] => 11/484683 [patent_app_country] => US [patent_app_date] => 2006-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 42 [patent_no_of_words] => 13958 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/309/07309624.pdf [firstpage_image] =>[orig_patent_app_number] => 11484683 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/484683
Semiconductor device and method for the fabrication thereof including grinding a major portion of the frame Jul 11, 2006 Issued
Array ( [id] => 4614309 [patent_doc_number] => 07989915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Vertical electrical device' [patent_app_type] => utility [patent_app_number] => 11/485034 [patent_app_country] => US [patent_app_date] => 2006-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 24 [patent_no_of_words] => 3998 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989915.pdf [firstpage_image] =>[orig_patent_app_number] => 11485034 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/485034
Vertical electrical device Jul 10, 2006 Issued
Array ( [id] => 5661675 [patent_doc_number] => 20060252271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Atomic layer deposition using photo-enhanced bond reconfiguration' [patent_app_type] => utility [patent_app_number] => 11/483295 [patent_app_country] => US [patent_app_date] => 2006-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3825 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20060252271.pdf [firstpage_image] =>[orig_patent_app_number] => 11483295 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/483295
Atomic layer deposition using photo-enhanced bond reconfiguration Jul 5, 2006 Issued
Array ( [id] => 5499304 [patent_doc_number] => 20090159992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING A POLYSILICON ELECTRODE' [patent_app_type] => utility [patent_app_number] => 11/917103 [patent_app_country] => US [patent_app_date] => 2006-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2808 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20090159992.pdf [firstpage_image] =>[orig_patent_app_number] => 11917103 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/917103
Semiconductor device having a polysilicon electrode including amorphizing, recrystallising, and removing part of the polysilicon electrode Jun 12, 2006 Issued
Array ( [id] => 4813422 [patent_doc_number] => 20080194053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Methods for Fabricating Micro-Electro-Mechanical Devices' [patent_app_type] => utility [patent_app_number] => 11/914594 [patent_app_country] => US [patent_app_date] => 2006-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 18549 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20080194053.pdf [firstpage_image] =>[orig_patent_app_number] => 11914594 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/914594
Methods for fabricating micro-electro-mechanical devices May 17, 2006 Issued
Array ( [id] => 5428624 [patent_doc_number] => 20090087934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'Method of Manufacturing Nitride Semiconductor Light Emitting Element' [patent_app_type] => utility [patent_app_number] => 11/915493 [patent_app_country] => US [patent_app_date] => 2006-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4487 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20090087934.pdf [firstpage_image] =>[orig_patent_app_number] => 11915493 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/915493
Method of manufacturing nitride semiconductor light emitting element including forming scribe lines sandwiching and removing high density dislocation sections May 14, 2006 Issued
Array ( [id] => 5780221 [patent_doc_number] => 20060202316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Semiconductor component having stiffener, circuit decal and terminal contacts' [patent_app_type] => utility [patent_app_number] => 11/434475 [patent_app_country] => US [patent_app_date] => 2006-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7590 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20060202316.pdf [firstpage_image] =>[orig_patent_app_number] => 11434475 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/434475
Semiconductor component having stiffener, circuit decal and terminal contacts May 14, 2006 Issued
Array ( [id] => 74069 [patent_doc_number] => 07749843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Method for fabricating semiconductor device with bulb-shaped recess gate' [patent_app_type] => utility [patent_app_number] => 11/413189 [patent_app_country] => US [patent_app_date] => 2006-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1540 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/749/07749843.pdf [firstpage_image] =>[orig_patent_app_number] => 11413189 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/413189
Method for fabricating semiconductor device with bulb-shaped recess gate Apr 27, 2006 Issued
Array ( [id] => 211488 [patent_doc_number] => 07622394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Method of fabricating semiconductor device including forming a protective layer and removing after etching a trench' [patent_app_type] => utility [patent_app_number] => 11/391353 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4696 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/622/07622394.pdf [firstpage_image] =>[orig_patent_app_number] => 11391353 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/391353
Method of fabricating semiconductor device including forming a protective layer and removing after etching a trench Mar 28, 2006 Issued
Array ( [id] => 4946935 [patent_doc_number] => 20080303061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-11 [patent_title] => 'Substrate Production Method and Substrate' [patent_app_type] => utility [patent_app_number] => 11/910104 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0303/20080303061.pdf [firstpage_image] =>[orig_patent_app_number] => 11910104 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/910104
Substrate production method and substrate including amorphization and recrystallizing a top region Mar 28, 2006 Issued
Array ( [id] => 4999904 [patent_doc_number] => 20070042538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'METHODS FOR PRESERVING STRAINED SEMICONDUCTOR SUBSTRATE LAYERS DURING CMOS PROCESSING' [patent_app_type] => utility [patent_app_number] => 11/371687 [patent_app_country] => US [patent_app_date] => 2006-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6270 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20070042538.pdf [firstpage_image] =>[orig_patent_app_number] => 11371687 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/371687
Methods for preserving strained semiconductor substrate layers during CMOS processing Mar 8, 2006 Issued
Array ( [id] => 5661685 [patent_doc_number] => 20060252281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Semiconductor device and gate structure having a composite dielectric layer and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/366453 [patent_app_country] => US [patent_app_date] => 2006-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7643 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20060252281.pdf [firstpage_image] =>[orig_patent_app_number] => 11366453 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/366453
Semiconductor device and gate structure having a composite dielectric layer and methods of manufacturing the same Mar 2, 2006 Issued
Array ( [id] => 5683057 [patent_doc_number] => 20060199327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Method for manufacturing semiconductor elemental device' [patent_app_type] => utility [patent_app_number] => 11/366384 [patent_app_country] => US [patent_app_date] => 2006-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3466 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20060199327.pdf [firstpage_image] =>[orig_patent_app_number] => 11366384 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/366384
Method for manufacturing semiconductor elemental device forming an amorphous high dielectric film and an amorphous silicon film Mar 2, 2006 Issued
Array ( [id] => 4879803 [patent_doc_number] => 20080153186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Evaluation Method for Crystal Defect in Silicon Single Crystal Wafer' [patent_app_type] => utility [patent_app_number] => 11/883184 [patent_app_country] => US [patent_app_date] => 2006-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4463 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20080153186.pdf [firstpage_image] =>[orig_patent_app_number] => 11883184 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/883184
Evaluation method for crystal defect in silicon single crystal wafer Jan 22, 2006 Issued
Array ( [id] => 5614029 [patent_doc_number] => 20060115957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces' [patent_app_type] => utility [patent_app_number] => 11/327794 [patent_app_country] => US [patent_app_date] => 2006-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6387 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20060115957.pdf [firstpage_image] =>[orig_patent_app_number] => 11327794 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/327794
Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces Jan 5, 2006 Issued
Array ( [id] => 5057015 [patent_doc_number] => 20070059937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/320624 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2852 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20070059937.pdf [firstpage_image] =>[orig_patent_app_number] => 11320624 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/320624
Semiconductor device and method for manufacturing the same including two antireflective coating films Dec 29, 2005 Issued
Array ( [id] => 5422550 [patent_doc_number] => 20090149005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'METHOD FOR MAKING A DISMOUNTABLE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 11/719834 [patent_app_country] => US [patent_app_date] => 2005-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4603 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20090149005.pdf [firstpage_image] =>[orig_patent_app_number] => 11719834 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/719834
Method for forming a detachable substrate including implantation and exfoliation Nov 24, 2005 Issued
Array ( [id] => 5715648 [patent_doc_number] => 20060079011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Methods for marking a bare semiconductor die' [patent_app_type] => utility [patent_app_number] => 11/282893 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6201 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20060079011.pdf [firstpage_image] =>[orig_patent_app_number] => 11282893 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/282893
Methods for marking a bare semiconductor die including applying a tape having energy-markable properties Nov 17, 2005 Issued
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