Search

Peter M. Poon

Supervisory Patent Examiner (ID: 9670, Phone: (571)272-6891 , Office: P/3643 )

Most Active Art Unit
3103
Art Unit(s)
3613, 3103, 3643, 3644
Total Applications
884
Issued Applications
571
Pending Applications
66
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 744734 [patent_doc_number] => 07026225 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-11 [patent_title] => 'Semiconductor component and method for precluding stress-induced void formation in the semiconductor component' [patent_app_type] => utility [patent_app_number] => 10/697214 [patent_app_country] => US [patent_app_date] => 2003-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5661 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/026/07026225.pdf [firstpage_image] =>[orig_patent_app_number] => 10697214 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/697214
Semiconductor component and method for precluding stress-induced void formation in the semiconductor component Oct 28, 2003 Issued
Array ( [id] => 7617133 [patent_doc_number] => 06946307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-20 [patent_title] => 'Method and system for testing driver circuits of AMOLED' [patent_app_type] => utility [patent_app_number] => 10/694034 [patent_app_country] => US [patent_app_date] => 2003-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 1805 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/946/06946307.pdf [firstpage_image] =>[orig_patent_app_number] => 10694034 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/694034
Method and system for testing driver circuits of AMOLED Oct 26, 2003 Issued
Array ( [id] => 788352 [patent_doc_number] => 06987285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-17 [patent_title] => 'Semiconductor light emitting device in which high-power light output can be obtained with a simple structure including InGaAsP active layer not less than 3.5 microns and InGaAsP and InP cladding' [patent_app_type] => utility [patent_app_number] => 10/692125 [patent_app_country] => US [patent_app_date] => 2003-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 13507 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/987/06987285.pdf [firstpage_image] =>[orig_patent_app_number] => 10692125 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/692125
Semiconductor light emitting device in which high-power light output can be obtained with a simple structure including InGaAsP active layer not less than 3.5 microns and InGaAsP and InP cladding Oct 22, 2003 Issued
Array ( [id] => 941252 [patent_doc_number] => 06969643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-29 [patent_title] => 'Thin film transistor array panel used for a liquid crystal display and a manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/692033 [patent_app_country] => US [patent_app_date] => 2003-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 40 [patent_no_of_words] => 5372 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/969/06969643.pdf [firstpage_image] =>[orig_patent_app_number] => 10692033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/692033
Thin film transistor array panel used for a liquid crystal display and a manufacturing method thereof Oct 22, 2003 Issued
Array ( [id] => 6990246 [patent_doc_number] => 20050089283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'System and method for hermetically sealing a package' [patent_app_type] => utility [patent_app_number] => 10/693213 [patent_app_country] => US [patent_app_date] => 2003-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5230 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20050089283.pdf [firstpage_image] =>[orig_patent_app_number] => 10693213 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/693213
System and method for hermetically sealing a package Oct 22, 2003 Issued
Array ( [id] => 7161990 [patent_doc_number] => 20050085050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'Substrate thinning including planarization' [patent_app_type] => utility [patent_app_number] => 10/690174 [patent_app_country] => US [patent_app_date] => 2003-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4312 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20050085050.pdf [firstpage_image] =>[orig_patent_app_number] => 10690174 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690174
Substrate thinning including planarization Oct 20, 2003 Issued
Array ( [id] => 988129 [patent_doc_number] => 06921684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-26 [patent_title] => 'Method of sorting carbon nanotubes including protecting metallic nanotubes and removing the semiconducting nanotubes' [patent_app_type] => utility [patent_app_number] => 10/688854 [patent_app_country] => US [patent_app_date] => 2003-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1799 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/921/06921684.pdf [firstpage_image] =>[orig_patent_app_number] => 10688854 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/688854
Method of sorting carbon nanotubes including protecting metallic nanotubes and removing the semiconducting nanotubes Oct 16, 2003 Issued
Array ( [id] => 7203956 [patent_doc_number] => 20040087123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Method for forming a gate electrode in a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/680813 [patent_app_country] => US [patent_app_date] => 2003-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7102 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20040087123.pdf [firstpage_image] =>[orig_patent_app_number] => 10680813 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/680813
Method for forming a gate electrode in a semiconductor device including re-oxidation for restraining the thickness of the gate oxide Oct 6, 2003 Issued
Array ( [id] => 954096 [patent_doc_number] => 06958511 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-10-25 [patent_title] => 'Flash memory device and method of fabrication thereof including a bottom oxide layer with two regions with different concentrations of nitrogen' [patent_app_type] => utility [patent_app_number] => 10/679774 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 10013 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/958/06958511.pdf [firstpage_image] =>[orig_patent_app_number] => 10679774 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/679774
Flash memory device and method of fabrication thereof including a bottom oxide layer with two regions with different concentrations of nitrogen Oct 5, 2003 Issued
Array ( [id] => 931104 [patent_doc_number] => 06979608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Method of manufacturing an on-chip inductor having improved quality factor' [patent_app_type] => utility [patent_app_number] => 10/673874 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 2345 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/979/06979608.pdf [firstpage_image] =>[orig_patent_app_number] => 10673874 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/673874
Method of manufacturing an on-chip inductor having improved quality factor Sep 28, 2003 Issued
Array ( [id] => 7167354 [patent_doc_number] => 20040077166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-22 [patent_title] => 'Semiconductor crystal growing method and semiconductor light-emitting device' [patent_app_type] => new [patent_app_number] => 10/467413 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3276 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20040077166.pdf [firstpage_image] =>[orig_patent_app_number] => 10467413 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/467413
Semiconductor crystal growing method and semiconductor light-emitting device Sep 28, 2003 Abandoned
Array ( [id] => 1062771 [patent_doc_number] => 06849515 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-01 [patent_title] => 'Semiconductor process for disposable sidewall spacers' [patent_app_type] => utility [patent_app_number] => 10/670634 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3324 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/849/06849515.pdf [firstpage_image] =>[orig_patent_app_number] => 10670634 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670634
Semiconductor process for disposable sidewall spacers Sep 24, 2003 Issued
Array ( [id] => 694817 [patent_doc_number] => 07071074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Structure and method for placement, sizing and shaping of dummy structures' [patent_app_type] => utility [patent_app_number] => 10/671123 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3427 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/071/07071074.pdf [firstpage_image] =>[orig_patent_app_number] => 10671123 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/671123
Structure and method for placement, sizing and shaping of dummy structures Sep 23, 2003 Issued
Array ( [id] => 7242032 [patent_doc_number] => 20050073035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Semiconductor component having stiffener and circuit decal and method of fabrication' [patent_app_type] => utility [patent_app_number] => 10/666302 [patent_app_country] => US [patent_app_date] => 2003-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7542 [patent_no_of_claims] => 87 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20050073035.pdf [firstpage_image] =>[orig_patent_app_number] => 10666302 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/666302
Semiconductor component and system having stiffener and circuit decal Sep 18, 2003 Issued
Array ( [id] => 710750 [patent_doc_number] => 07056806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces' [patent_app_type] => utility [patent_app_number] => 10/665099 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6388 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/056/07056806.pdf [firstpage_image] =>[orig_patent_app_number] => 10665099 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/665099
Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces Sep 16, 2003 Issued
Array ( [id] => 7125169 [patent_doc_number] => 20050056913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Stereolithographic method for forming insulative coatings for via holes in semiconductor devices, insulative coatings so formed, systems for forming the insulative coatings, and semiconductor devices including via holes with the insulative coatings' [patent_app_type] => utility [patent_app_number] => 10/663944 [patent_app_country] => US [patent_app_date] => 2003-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9506 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20050056913.pdf [firstpage_image] =>[orig_patent_app_number] => 10663944 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/663944
Stereolithographic method for forming insulative coatings for via holes in semiconductor devices Sep 15, 2003 Issued
Array ( [id] => 564085 [patent_doc_number] => 07157792 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-02 [patent_title] => 'Forming a substantially planar upper surface at the outer edge of a semiconductor topography' [patent_app_type] => utility [patent_app_number] => 10/662636 [patent_app_country] => US [patent_app_date] => 2003-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 8121 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/157/07157792.pdf [firstpage_image] =>[orig_patent_app_number] => 10662636 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/662636
Forming a substantially planar upper surface at the outer edge of a semiconductor topography Sep 14, 2003 Issued
Array ( [id] => 982260 [patent_doc_number] => 06927104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Method of forming double-gated silicon-on-insulator (SOI) transistors with corner rounding' [patent_app_type] => utility [patent_app_number] => 10/662674 [patent_app_country] => US [patent_app_date] => 2003-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2802 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 467 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927104.pdf [firstpage_image] =>[orig_patent_app_number] => 10662674 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/662674
Method of forming double-gated silicon-on-insulator (SOI) transistors with corner rounding Sep 14, 2003 Issued
Array ( [id] => 7203669 [patent_doc_number] => 20050042797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Method and apparatus for manufacturing color filter' [patent_app_type] => utility [patent_app_number] => 10/659283 [patent_app_country] => US [patent_app_date] => 2003-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5312 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20050042797.pdf [firstpage_image] =>[orig_patent_app_number] => 10659283 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/659283
Method for making a color filter including attaching a mold to a substrate and then filling with a photopolymer solution Sep 10, 2003 Issued
Array ( [id] => 5634932 [patent_doc_number] => 20060065905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Semiconductor component and production method' [patent_app_type] => utility [patent_app_number] => 10/529673 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7772 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20060065905.pdf [firstpage_image] =>[orig_patent_app_number] => 10529673 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/529673
Method of forming light emitting devices including forming mesas and singulating Sep 4, 2003 Issued
Menu