
Peter R. Brown
Examiner (ID: 10270)
| Most Active Art Unit | 3636 |
| Art Unit(s) | 3507, 3508, 3636, 3624 |
| Total Applications | 3230 |
| Issued Applications | 2608 |
| Pending Applications | 120 |
| Abandoned Applications | 505 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14036457
[patent_doc_number] => 10229985
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-03-12
[patent_title] => Vertical field-effect transistor with uniform bottom spacer
[patent_app_type] => utility
[patent_app_number] => 15/830665
[patent_app_country] => US
[patent_app_date] => 2017-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 5692
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15830665
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/830665 | Vertical field-effect transistor with uniform bottom spacer | Dec 3, 2017 | Issued |
Array
(
[id] => 15234353
[patent_doc_number] => 10504906
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-10
[patent_title] => FinFET SRAM layout and method of making the same
[patent_app_type] => utility
[patent_app_number] => 15/830671
[patent_app_country] => US
[patent_app_date] => 2017-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2104
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15830671
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/830671 | FinFET SRAM layout and method of making the same | Dec 3, 2017 | Issued |
Array
(
[id] => 13819497
[patent_doc_number] => 10186522
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-22
[patent_title] => Three-dimensional semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 15/827028
[patent_app_country] => US
[patent_app_date] => 2017-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 23
[patent_no_of_words] => 6411
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15827028
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/827028 | Three-dimensional semiconductor memory device | Nov 29, 2017 | Issued |
Array
(
[id] => 14148403
[patent_doc_number] => 10254574
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-09
[patent_title] => Display device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 15/820564
[patent_app_country] => US
[patent_app_date] => 2017-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 46
[patent_no_of_words] => 12723
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820564
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/820564 | Display device and manufacturing method thereof | Nov 21, 2017 | Issued |
Array
(
[id] => 14397605
[patent_doc_number] => 10312093
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-06-04
[patent_title] => Semiconductor device having a surface insulator layer and manufacturing method therefor
[patent_app_type] => utility
[patent_app_number] => 15/820561
[patent_app_country] => US
[patent_app_date] => 2017-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 6362
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820561
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/820561 | Semiconductor device having a surface insulator layer and manufacturing method therefor | Nov 21, 2017 | Issued |
Array
(
[id] => 14063835
[patent_doc_number] => 10236219
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-03-19
[patent_title] => VFET metal gate patterning for vertical transport field effect transistor
[patent_app_type] => utility
[patent_app_number] => 15/820603
[patent_app_country] => US
[patent_app_date] => 2017-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 59
[patent_figures_cnt] => 107
[patent_no_of_words] => 23965
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820603
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/820603 | VFET metal gate patterning for vertical transport field effect transistor | Nov 21, 2017 | Issued |
Array
(
[id] => 14644645
[patent_doc_number] => 10367073
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-30
[patent_title] => Thin film transistor (TFT) with structured gate insulator
[patent_app_type] => utility
[patent_app_number] => 15/820594
[patent_app_country] => US
[patent_app_date] => 2017-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 25
[patent_no_of_words] => 9702
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 379
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820594
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/820594 | Thin film transistor (TFT) with structured gate insulator | Nov 21, 2017 | Issued |
Array
(
[id] => 12779902
[patent_doc_number] => 20180151802
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-31
[patent_title] => INTERCONNECT STRUCTURE AND METHOD FOR ON-CHIP INFORMATION TRANSFER
[patent_app_type] => utility
[patent_app_number] => 15/820627
[patent_app_country] => US
[patent_app_date] => 2017-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4703
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820627
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/820627 | Interconnect structure and method for on-chip information transfer | Nov 21, 2017 | Issued |
Array
(
[id] => 12779908
[patent_doc_number] => 20180151804
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-31
[patent_title] => INTEGRATION OF MICRO-DEVICES INTO SYSTEM SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 15/820683
[patent_app_country] => US
[patent_app_date] => 2017-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13796
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820683
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/820683 | Integration of micro-devices into system substrate | Nov 21, 2017 | Issued |
Array
(
[id] => 15611261
[patent_doc_number] => 10586700
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-03-10
[patent_title] => Protection of low temperature isolation fill
[patent_app_type] => utility
[patent_app_number] => 15/815111
[patent_app_country] => US
[patent_app_date] => 2017-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 7365
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15815111
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/815111 | Protection of low temperature isolation fill | Nov 15, 2017 | Issued |
Array
(
[id] => 12738733
[patent_doc_number] => 20180138078
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-17
[patent_title] => Method for Regulating Hardmask Over-Etch for Multi-Patterning Processes
[patent_app_type] => utility
[patent_app_number] => 15/815371
[patent_app_country] => US
[patent_app_date] => 2017-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3139
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15815371
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/815371 | Method for Regulating Hardmask Over-Etch for Multi-Patterning Processes | Nov 15, 2017 | Abandoned |
Array
(
[id] => 14604085
[patent_doc_number] => 10355241
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-16
[patent_title] => Method of manufacturing a display apparatus including a bending area
[patent_app_type] => utility
[patent_app_number] => 15/815098
[patent_app_country] => US
[patent_app_date] => 2017-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 21
[patent_no_of_words] => 12311
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15815098
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/815098 | Method of manufacturing a display apparatus including a bending area | Nov 15, 2017 | Issued |
Array
(
[id] => 14920125
[patent_doc_number] => 10431389
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-10-01
[patent_title] => Solid electrolytic capacitor for high voltage environments
[patent_app_type] => utility
[patent_app_number] => 15/810485
[patent_app_country] => US
[patent_app_date] => 2017-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 8866
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15810485
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/810485 | Solid electrolytic capacitor for high voltage environments | Nov 12, 2017 | Issued |
Array
(
[id] => 13121991
[patent_doc_number] => 10079353
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-18
[patent_title] => Light-emitting device with flexible substrates
[patent_app_type] => utility
[patent_app_number] => 15/810249
[patent_app_country] => US
[patent_app_date] => 2017-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 131
[patent_no_of_words] => 37730
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15810249
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/810249 | Light-emitting device with flexible substrates | Nov 12, 2017 | Issued |
Array
(
[id] => 14247949
[patent_doc_number] => 10274169
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-30
[patent_title] => MEMS LED zoom
[patent_app_type] => utility
[patent_app_number] => 15/809381
[patent_app_country] => US
[patent_app_date] => 2017-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 6949
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15809381
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/809381 | MEMS LED zoom | Nov 9, 2017 | Issued |
Array
(
[id] => 13543209
[patent_doc_number] => 20180323151
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-08
[patent_title] => WET ETCH REMOVAL OF Ru SELECTIVE TO OTHER METALS
[patent_app_type] => utility
[patent_app_number] => 15/808193
[patent_app_country] => US
[patent_app_date] => 2017-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6858
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808193
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/808193 | Wet etch removal of Ru selective to other metals | Nov 8, 2017 | Issued |
Array
(
[id] => 14205677
[patent_doc_number] => 10269966
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-23
[patent_title] => Semiconductor device including a fin structure
[patent_app_type] => utility
[patent_app_number] => 15/807317
[patent_app_country] => US
[patent_app_date] => 2017-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 28
[patent_no_of_words] => 5515
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15807317
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/807317 | Semiconductor device including a fin structure | Nov 7, 2017 | Issued |
Array
(
[id] => 12208515
[patent_doc_number] => 20180053741
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-22
[patent_title] => 'BUMP STRUCTURE HAVING A SIDE RECESS AND SEMICONDUCTOR STRUCTURE INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/803008
[patent_app_country] => US
[patent_app_date] => 2017-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 9451
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15803008
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/803008 | Bump structure having a side recess and semiconductor structure including the same | Nov 2, 2017 | Issued |
Array
(
[id] => 17188995
[patent_doc_number] => 20210335880
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-28
[patent_title] => SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/341786
[patent_app_country] => US
[patent_app_date] => 2017-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9864
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16341786
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/341786 | Solid-state imaging device, manufacturing method thereof, and electronic device | Oct 31, 2017 | Issued |
Array
(
[id] => 13057073
[patent_doc_number] => 10049934
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-14
[patent_title] => Wafer processing method
[patent_app_type] => utility
[patent_app_number] => 15/799567
[patent_app_country] => US
[patent_app_date] => 2017-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 5503
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 263
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15799567
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/799567 | Wafer processing method | Oct 30, 2017 | Issued |