Search

Peter R. Brown

Examiner (ID: 10270)

Most Active Art Unit
3636
Art Unit(s)
3507, 3508, 3636, 3624
Total Applications
3230
Issued Applications
2608
Pending Applications
120
Abandoned Applications
505

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10780770 [patent_doc_number] => 20160126926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-05 [patent_title] => 'MICROELECTROMECHANICAL RESONATORS' [patent_app_type] => utility [patent_app_number] => 14/932303 [patent_app_country] => US [patent_app_date] => 2015-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3164 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14932303 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/932303
Method of forming a resonator Nov 3, 2015 Issued
Array ( [id] => 11360390 [patent_doc_number] => 09537049 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-03 [patent_title] => 'Nanostructure semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 14/929612 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 38 [patent_no_of_words] => 10248 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929612 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929612
Nanostructure semiconductor light emitting device Nov 1, 2015 Issued
Array ( [id] => 10787585 [patent_doc_number] => 20160133741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SILICON CARBIDE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/929742 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7721 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929742 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929742
SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SILICON CARBIDE SEMICONDUCTOR DEVICE Nov 1, 2015 Abandoned
Array ( [id] => 11300807 [patent_doc_number] => 09508818 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-29 [patent_title] => 'Method and structure for forming gate contact above active area with trench silicide' [patent_app_type] => utility [patent_app_number] => 14/929753 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5015 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929753 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929753
Method and structure for forming gate contact above active area with trench silicide Nov 1, 2015 Issued
Array ( [id] => 10645336 [patent_doc_number] => 09362211 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-07 [patent_title] => 'Exposed pad integrated circuit package with mold lock' [patent_app_type] => utility [patent_app_number] => 14/929381 [patent_app_country] => US [patent_app_date] => 2015-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3355 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929381 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929381
Exposed pad integrated circuit package with mold lock Oct 31, 2015 Issued
Array ( [id] => 11246620 [patent_doc_number] => 09472671 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-10-18 [patent_title] => 'Method and structure for forming dually strained silicon' [patent_app_type] => utility [patent_app_number] => 14/929312 [patent_app_country] => US [patent_app_date] => 2015-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2202 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929312 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929312
Method and structure for forming dually strained silicon Oct 30, 2015 Issued
Array ( [id] => 11557611 [patent_doc_number] => 20170103856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-13 [patent_title] => 'Continuous process for producing electrodes for supercapacitors having high energy densities' [patent_app_type] => utility [patent_app_number] => 14/756777 [patent_app_country] => US [patent_app_date] => 2015-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 22318 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14756777 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/756777
Continuous process for producing electrodes for supercapacitors having high energy densities Oct 12, 2015 Issued
Array ( [id] => 10681803 [patent_doc_number] => 20160027948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'INTEGRATED THIN FILM SOLAR CELL INTERCONNECTION' [patent_app_type] => utility [patent_app_number] => 14/869528 [patent_app_country] => US [patent_app_date] => 2015-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14869528 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/869528
Integrated thin film solar cell interconnection Sep 28, 2015 Issued
Array ( [id] => 12038463 [patent_doc_number] => 09816687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'MEMS LED zoom' [patent_app_type] => utility [patent_app_number] => 14/863944 [patent_app_country] => US [patent_app_date] => 2015-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6971 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14863944 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/863944
MEMS LED zoom Sep 23, 2015 Issued
Array ( [id] => 10491004 [patent_doc_number] => 20150376026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'Methods for preparing Cu2ZnSnS4 nanoparticles for use in thin film photovoltaic cells' [patent_app_type] => utility [patent_app_number] => 14/842909 [patent_app_country] => US [patent_app_date] => 2015-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3711 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842909 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/842909
Methods for preparing Cu2ZnSnS4 nanoparticles for use in thin film photovoltaic cells Sep 1, 2015 Issued
Array ( [id] => 10486823 [patent_doc_number] => 20150371843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/837247 [patent_app_country] => US [patent_app_date] => 2015-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 30231 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14837247 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/837247
Method of manufacturing semiconductor device and substrate processing apparatus Aug 26, 2015 Issued
Array ( [id] => 11475358 [patent_doc_number] => 20170062141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'Porous Particles of Interconnected 3D Graphene as a Supercapacitor Electrode Active Material and Production Process' [patent_app_type] => utility [patent_app_number] => 14/756315 [patent_app_country] => US [patent_app_date] => 2015-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10434 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14756315 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/756315
Porous particles of interconnected 3D graphene as a supercapacitor electrode active material and production process Aug 25, 2015 Issued
Array ( [id] => 10696802 [patent_doc_number] => 20160042950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-11 [patent_title] => 'MULTI MATERIALS AND SELECTIVE REMOVAL ENABLED RESERVE TONE PROCESS' [patent_app_type] => utility [patent_app_number] => 14/818068 [patent_app_country] => US [patent_app_date] => 2015-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2685 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14818068 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/818068
Multi materials and selective removal enabled reverse tone process Aug 3, 2015 Issued
Array ( [id] => 10652143 [patent_doc_number] => 09368406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Method for manufacturing semiconductor chip' [patent_app_type] => utility [patent_app_number] => 14/817873 [patent_app_country] => US [patent_app_date] => 2015-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 33 [patent_no_of_words] => 9334 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14817873 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/817873
Method for manufacturing semiconductor chip Aug 3, 2015 Issued
Array ( [id] => 11890923 [patent_doc_number] => 09761488 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-12 [patent_title] => 'Method for cleaning via of interconnect structure of semiconductor device structure' [patent_app_type] => utility [patent_app_number] => 14/802734 [patent_app_country] => US [patent_app_date] => 2015-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 6193 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14802734 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/802734
Method for cleaning via of interconnect structure of semiconductor device structure Jul 16, 2015 Issued
Array ( [id] => 10433241 [patent_doc_number] => 20150318253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'BUMP STRUCTURE HAVING A SIDE RECESS AND SEMICONDUCTOR STRUCTURE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/800934 [patent_app_country] => US [patent_app_date] => 2015-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9486 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14800934 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/800934
Bump structure having a side recess and semiconductor structure including the same Jul 15, 2015 Issued
Array ( [id] => 10667133 [patent_doc_number] => 20160013278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'METHOD OF PRODUCING EPITAXIAL SILICON WAFER, EPITAXIAL SILICON WAFER, AND METHOD OF PRODUCING SOLID-STATE IMAGE SENSING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/799435 [patent_app_country] => US [patent_app_date] => 2015-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7419 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14799435 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/799435
Semiconductor epitaxial wafer Jul 13, 2015 Issued
Array ( [id] => 12334725 [patent_doc_number] => 09947576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => UV-assisted material injection into porous films [patent_app_type] => utility [patent_app_number] => 14/797960 [patent_app_country] => US [patent_app_date] => 2015-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4951 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14797960 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/797960
UV-assisted material injection into porous films Jul 12, 2015 Issued
Array ( [id] => 11279682 [patent_doc_number] => 09496165 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-15 [patent_title] => 'Method of forming a flexible semiconductor layer and devices on a flexible carrier' [patent_app_type] => utility [patent_app_number] => 14/795019 [patent_app_country] => US [patent_app_date] => 2015-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 46 [patent_no_of_words] => 8027 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14795019 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/795019
Method of forming a flexible semiconductor layer and devices on a flexible carrier Jul 8, 2015 Issued
Array ( [id] => 11227453 [patent_doc_number] => 09455179 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-27 [patent_title] => 'Methods to reduce debonding forces on flexible semiconductor films disposed on vapor-releasing adhesives' [patent_app_type] => utility [patent_app_number] => 14/795216 [patent_app_country] => US [patent_app_date] => 2015-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 6042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14795216 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/795216
Methods to reduce debonding forces on flexible semiconductor films disposed on vapor-releasing adhesives Jul 8, 2015 Issued
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