
Phallaka Kik
Examiner (ID: 11978, Phone: (571)272-1895 , Office: P/2851 )
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2825, 2764, 2768, 2763, 2851, 2304 |
| Total Applications | 1951 |
| Issued Applications | 1745 |
| Pending Applications | 98 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13041667
[patent_doc_number] => 10042971
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-08-07
[patent_title] => Placement and routing of clock signals for a circuit design
[patent_app_type] => utility
[patent_app_number] => 15/210756
[patent_app_country] => US
[patent_app_date] => 2016-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5802
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210756
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/210756 | Placement and routing of clock signals for a circuit design | Jul 13, 2016 | Issued |
Array
(
[id] => 12141083
[patent_doc_number] => 20180019166
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-18
[patent_title] => 'DEFECT INSPECTION AND REPAIRING METHOD AND ASSOCIATED SYSTEM AND NON-TRANSITORY COMPUTER READABLE MEDIUM'
[patent_app_type] => utility
[patent_app_number] => 15/210065
[patent_app_country] => US
[patent_app_date] => 2016-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4296
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210065
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/210065 | Defect inspection and repairing method and associated system and non-transitory computer readable medium | Jul 13, 2016 | Issued |
Array
(
[id] => 12514269
[patent_doc_number] => 10002222
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-19
[patent_title] => System and method for perforating redundant metal in self-aligned multiple patterning
[patent_app_type] => utility
[patent_app_number] => 15/210109
[patent_app_country] => US
[patent_app_date] => 2016-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 14412
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210109
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/210109 | System and method for perforating redundant metal in self-aligned multiple patterning | Jul 13, 2016 | Issued |
Array
(
[id] => 11314360
[patent_doc_number] => 20160350470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-01
[patent_title] => 'DETERMINING ECO AGGRESSOR NETS DURING INCREMENTAL EXTRACTION'
[patent_app_type] => utility
[patent_app_number] => 15/163628
[patent_app_country] => US
[patent_app_date] => 2016-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5939
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163628
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/163628 | Determining ECO aggressor nets during incremental extraction | May 23, 2016 | Issued |
Array
(
[id] => 12551919
[patent_doc_number] => 10013522
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-03
[patent_title] => Method of extracting capacitances of arbitrarily oriented 3D interconnects
[patent_app_type] => utility
[patent_app_number] => 15/162254
[patent_app_country] => US
[patent_app_date] => 2016-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 27
[patent_no_of_words] => 12638
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 260
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15162254
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/162254 | Method of extracting capacitances of arbitrarily oriented 3D interconnects | May 22, 2016 | Issued |
Array
(
[id] => 16323326
[patent_doc_number] => 10783292
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-09-22
[patent_title] => Automated analog layout
[patent_app_type] => utility
[patent_app_number] => 15/162458
[patent_app_country] => US
[patent_app_date] => 2016-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 45
[patent_no_of_words] => 15971
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15162458
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/162458 | Automated analog layout | May 22, 2016 | Issued |
Array
(
[id] => 12249378
[patent_doc_number] => 09922154
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-20
[patent_title] => 'Enabling an incremental sign-off process using design data'
[patent_app_type] => utility
[patent_app_number] => 15/160658
[patent_app_country] => US
[patent_app_date] => 2016-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 11801
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160658
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/160658 | Enabling an incremental sign-off process using design data | May 19, 2016 | Issued |
Array
(
[id] => 13969551
[patent_doc_number] => 10214114
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-26
[patent_title] => Cord reel variable current thermal management and damage detection
[patent_app_type] => utility
[patent_app_number] => 15/141012
[patent_app_country] => US
[patent_app_date] => 2016-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2218
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141012
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/141012 | Cord reel variable current thermal management and damage detection | Apr 27, 2016 | Issued |
Array
(
[id] => 12256176
[patent_doc_number] => 09928322
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-27
[patent_title] => 'Simulation of modifications to microprocessor design'
[patent_app_type] => utility
[patent_app_number] => 15/135595
[patent_app_country] => US
[patent_app_date] => 2016-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7972
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15135595
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/135595 | Simulation of modifications to microprocessor design | Apr 21, 2016 | Issued |
Array
(
[id] => 16058635
[patent_doc_number] => 10688241
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-23
[patent_title] => Multi-mode power supply system for a portable infusion device
[patent_app_type] => utility
[patent_app_number] => 16/094719
[patent_app_country] => US
[patent_app_date] => 2016-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2393
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16094719
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/094719 | Multi-mode power supply system for a portable infusion device | Apr 17, 2016 | Issued |
Array
(
[id] => 11474282
[patent_doc_number] => 20170061065
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-02
[patent_title] => 'TIMING CONSTRAINTS FORMULATION FOR HIGHLY REPLICATED DESIGN MODULES'
[patent_app_type] => utility
[patent_app_number] => 15/094090
[patent_app_country] => US
[patent_app_date] => 2016-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3996
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15094090
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/094090 | Timing constraints formulation for highly replicated design modules | Apr 7, 2016 | Issued |
Array
(
[id] => 12122168
[patent_doc_number] => 20180005754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-04
[patent_title] => 'Flux cancelling Rx coil for Wireless charging electronic device or smartphone or portable tablet or computer.'
[patent_app_type] => utility
[patent_app_number] => 15/089590
[patent_app_country] => US
[patent_app_date] => 2016-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 1519
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089590
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/089590 | Flux cancelling Rx coil for Wireless charging electronic device or smartphone or portable tablet or computer. | Apr 3, 2016 | Abandoned |
Array
(
[id] => 11531394
[patent_doc_number] => 20170091372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-30
[patent_title] => 'GATE LENGTH UPSIZING FOR LOW LEAKAGE STANDARD CELLS'
[patent_app_type] => utility
[patent_app_number] => 15/088210
[patent_app_country] => US
[patent_app_date] => 2016-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5556
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088210
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/088210 | Gate length upsizing for low leakage standard cells | Mar 31, 2016 | Issued |
Array
(
[id] => 12174081
[patent_doc_number] => 09892225
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-13
[patent_title] => 'Method for optimizing the design of micro-fluidic devices'
[patent_app_type] => utility
[patent_app_number] => 15/088581
[patent_app_country] => US
[patent_app_date] => 2016-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 33
[patent_no_of_words] => 16064
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088581
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/088581 | Method for optimizing the design of micro-fluidic devices | Mar 31, 2016 | Issued |
Array
(
[id] => 12174074
[patent_doc_number] => 09892218
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-13
[patent_title] => 'Parasitic-aware blockage'
[patent_app_type] => utility
[patent_app_number] => 15/089334
[patent_app_country] => US
[patent_app_date] => 2016-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 29
[patent_no_of_words] => 9853
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089334
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/089334 | Parasitic-aware blockage | Mar 31, 2016 | Issued |
Array
(
[id] => 13860595
[patent_doc_number] => 10192018
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-01-29
[patent_title] => Method and system for implementing efficient trim data representation for an electronic design
[patent_app_type] => utility
[patent_app_number] => 15/087933
[patent_app_country] => US
[patent_app_date] => 2016-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 10029
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 295
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15087933
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/087933 | Method and system for implementing efficient trim data representation for an electronic design | Mar 30, 2016 | Issued |
Array
(
[id] => 13017743
[patent_doc_number] => 10031986
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-07-24
[patent_title] => System and method for creating a spice deck for path-based analysis of an electronic circuit design using a stage-based technique
[patent_app_type] => utility
[patent_app_number] => 15/086654
[patent_app_country] => US
[patent_app_date] => 2016-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 16650
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15086654
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/086654 | System and method for creating a spice deck for path-based analysis of an electronic circuit design using a stage-based technique | Mar 30, 2016 | Issued |
Array
(
[id] => 11830932
[patent_doc_number] => 09727675
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-08
[patent_title] => 'Parameter extraction of DFT'
[patent_app_type] => utility
[patent_app_number] => 15/081735
[patent_app_country] => US
[patent_app_date] => 2016-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 11685
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15081735
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/081735 | Parameter extraction of DFT | Mar 24, 2016 | Issued |
Array
(
[id] => 11366044
[patent_doc_number] => 20170004024
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-05
[patent_title] => 'ROBUST AND ADAPTABLE MANAGEMENT OF EVENT COUNTERS'
[patent_app_type] => utility
[patent_app_number] => 15/073173
[patent_app_country] => US
[patent_app_date] => 2016-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5306
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15073173
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/073173 | Robust and adaptable management of event counters | Mar 16, 2016 | Issued |
Array
(
[id] => 11967735
[patent_doc_number] => 20170271888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-21
[patent_title] => 'BATTERY SYSTEM AND METHOD FOR DETERMINING AN OPEN CIRCUIT FAULT CONDITION IN A BATTERY MODULE'
[patent_app_type] => utility
[patent_app_number] => 15/070834
[patent_app_country] => US
[patent_app_date] => 2016-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4906
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15070834
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/070834 | Battery system and method for determining an open circuit fault condition in a battery module | Mar 14, 2016 | Issued |