
Phallaka Kik
Examiner (ID: 8609, Phone: (571)272-1895 , Office: P/2851 )
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2768, 2851, 2763, 2304, 2825, 2764 |
| Total Applications | 1982 |
| Issued Applications | 1763 |
| Pending Applications | 103 |
| Abandoned Applications | 144 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19677446
[patent_doc_number] => 12189302
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-07
[patent_title] => Computational metrology
[patent_app_type] => utility
[patent_app_number] => 17/738093
[patent_app_country] => US
[patent_app_date] => 2022-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 30
[patent_no_of_words] => 37294
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17738093
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/738093 | Computational metrology | May 5, 2022 | Issued |
Array
(
[id] => 18430723
[patent_doc_number] => 11675945
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-13
[patent_title] => Reset crossing and clock crossing interface for integrated circuit generation
[patent_app_type] => utility
[patent_app_number] => 17/734332
[patent_app_country] => US
[patent_app_date] => 2022-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 19022
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734332
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/734332 | Reset crossing and clock crossing interface for integrated circuit generation | May 1, 2022 | Issued |
Array
(
[id] => 18742103
[patent_doc_number] => 20230351085
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => DETECTING INSTABILITY IN COMBINATIONAL LOOPS IN ELECTRONIC CIRCUIT DESIGNS
[patent_app_type] => utility
[patent_app_number] => 17/733266
[patent_app_country] => US
[patent_app_date] => 2022-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19750
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17733266
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/733266 | Detecting instability in combinational loops in electronic circuit designs | Apr 28, 2022 | Issued |
Array
(
[id] => 17948168
[patent_doc_number] => 20220335187
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => MULTI-CYCLE TEST GENERATION AND SOURCE-BASED SIMULATION
[patent_app_type] => utility
[patent_app_number] => 17/721264
[patent_app_country] => US
[patent_app_date] => 2022-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9752
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721264
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/721264 | Multi-cycle test generation and source-based simulation | Apr 13, 2022 | Issued |
Array
(
[id] => 17738695
[patent_doc_number] => 20220224157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-14
[patent_title] => WIRELESS CHARGING OF ELECTRONIC DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/708365
[patent_app_country] => US
[patent_app_date] => 2022-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7356
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17708365
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/708365 | WIRELESS CHARGING OF ELECTRONIC DEVICES | Mar 29, 2022 | Abandoned |
Array
(
[id] => 17916266
[patent_doc_number] => 20220318662
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => SYSTEM AND METHOD FOR MAPPING QUANTUM CIRCUITS TO IONS IN A STORAGE RING QUANTUM COMPUTER ARCHITECTURE
[patent_app_type] => utility
[patent_app_number] => 17/706741
[patent_app_country] => US
[patent_app_date] => 2022-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6604
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17706741
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/706741 | System and method for mapping quantum circuits to ions in a storage ring quantum computer architecture | Mar 28, 2022 | Issued |
Array
(
[id] => 18124681
[patent_doc_number] => 20230010293
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN METHOD AND APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/656759
[patent_app_country] => US
[patent_app_date] => 2022-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6371
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17656759
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/656759 | Semiconductor integrated circuit design method and apparatus | Mar 27, 2022 | Issued |
Array
(
[id] => 17722425
[patent_doc_number] => 20220215147
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-07
[patent_title] => Temperature Control Systems And Methods For Integrated Circuits
[patent_app_type] => utility
[patent_app_number] => 17/703181
[patent_app_country] => US
[patent_app_date] => 2022-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6387
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703181
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/703181 | Temperature Control Systems And Methods For Integrated Circuits | Mar 23, 2022 | Pending |
Array
(
[id] => 18446282
[patent_doc_number] => 11681854
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-20
[patent_title] => Generation of layout including power delivery network
[patent_app_type] => utility
[patent_app_number] => 17/703898
[patent_app_country] => US
[patent_app_date] => 2022-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 19
[patent_no_of_words] => 11494
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703898
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/703898 | Generation of layout including power delivery network | Mar 23, 2022 | Issued |
Array
(
[id] => 18607070
[patent_doc_number] => 11748538
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-09-05
[patent_title] => Automated analog layout
[patent_app_type] => utility
[patent_app_number] => 17/655989
[patent_app_country] => US
[patent_app_date] => 2022-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 45
[patent_no_of_words] => 16023
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17655989
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/655989 | Automated analog layout | Mar 21, 2022 | Issued |
Array
(
[id] => 19931139
[patent_doc_number] => 12304334
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-20
[patent_title] => Service plug, in-vehicle power supply device, and vehicle
[patent_app_type] => utility
[patent_app_number] => 17/655652
[patent_app_country] => US
[patent_app_date] => 2022-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 2208
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17655652
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/655652 | Service plug, in-vehicle power supply device, and vehicle | Mar 20, 2022 | Issued |
Array
(
[id] => 17882085
[patent_doc_number] => 20220297562
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => ROTATION ANGLE DETECTING APPARATUS AND POWER TRANSMISSION AND RECEIVING SYSTEM FOR VEHICLE
[patent_app_type] => utility
[patent_app_number] => 17/694886
[patent_app_country] => US
[patent_app_date] => 2022-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8598
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 412
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694886
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/694886 | Rotation angle detecting apparatus and power transmission and receiving system for vehicle | Mar 14, 2022 | Issued |
Array
(
[id] => 18630747
[patent_doc_number] => 20230289642
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-14
[patent_title] => ENERGY RELAXATION SPECTROSCOPY USING AUTLER-TOWNES EFFECT
[patent_app_type] => utility
[patent_app_number] => 17/694051
[patent_app_country] => US
[patent_app_date] => 2022-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18111
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694051
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/694051 | Energy relaxation spectroscopy using autler-townes effect | Mar 13, 2022 | Issued |
Array
(
[id] => 19857323
[patent_doc_number] => 12260161
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-25
[patent_title] => Method for establishing variation model related to circuit characteristics for performing circuit simulation, and associated circuit simulation system
[patent_app_type] => utility
[patent_app_number] => 17/693396
[patent_app_country] => US
[patent_app_date] => 2022-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 7453
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 248
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693396
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/693396 | Method for establishing variation model related to circuit characteristics for performing circuit simulation, and associated circuit simulation system | Mar 12, 2022 | Issued |
Array
(
[id] => 18378413
[patent_doc_number] => 20230153501
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => NEAR-THRESHOLD CELL CIRCUIT DELAY MODEL
[patent_app_type] => utility
[patent_app_number] => 17/796794
[patent_app_country] => US
[patent_app_date] => 2022-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8259
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 353
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17796794
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/796794 | Near-threshold cell circuit delay model | Mar 9, 2022 | Issued |
Array
(
[id] => 19956659
[patent_doc_number] => 12327074
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-10
[patent_title] => Simulation apparatus and creation method of thermal equivalent circuit
[patent_app_type] => utility
[patent_app_number] => 17/692136
[patent_app_country] => US
[patent_app_date] => 2022-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 0
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 306
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692136
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/692136 | Simulation apparatus and creation method of thermal equivalent circuit | Mar 9, 2022 | Issued |
Array
(
[id] => 19523052
[patent_doc_number] => 12124781
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-22
[patent_title] => Method and apparatus of compiling verification system
[patent_app_type] => utility
[patent_app_number] => 17/690776
[patent_app_country] => US
[patent_app_date] => 2022-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 5274
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17690776
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/690776 | Method and apparatus of compiling verification system | Mar 8, 2022 | Issued |
Array
(
[id] => 19925090
[patent_doc_number] => 12299374
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-13
[patent_title] => System and method for fabricating a semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/690058
[patent_app_country] => US
[patent_app_date] => 2022-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 23
[patent_no_of_words] => 2112
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17690058
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/690058 | System and method for fabricating a semiconductor device | Mar 8, 2022 | Issued |
Array
(
[id] => 18149460
[patent_doc_number] => 20230023317
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-26
[patent_title] => Systems and Methods for Providing A Dynamic High Voltage Circuit Design Workflow
[patent_app_type] => utility
[patent_app_number] => 17/688966
[patent_app_country] => US
[patent_app_date] => 2022-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6626
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17688966
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/688966 | Systems and methods for providing a dynamic high voltage circuit design workflow | Mar 7, 2022 | Issued |
Array
(
[id] => 18630607
[patent_doc_number] => 20230289501
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-14
[patent_title] => Reducing Resources in Quantum Circuits
[patent_app_type] => utility
[patent_app_number] => 17/653949
[patent_app_country] => US
[patent_app_date] => 2022-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7849
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17653949
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/653949 | Reducing resources in quantum circuits | Mar 7, 2022 | Issued |