
Phallaka Kik
Examiner (ID: 8609, Phone: (571)272-1895 , Office: P/2851 )
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2768, 2851, 2763, 2304, 2825, 2764 |
| Total Applications | 1982 |
| Issued Applications | 1763 |
| Pending Applications | 103 |
| Abandoned Applications | 144 |
Applications
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|---|---|---|---|
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