
Phat X. Cao
Examiner (ID: 4407, Phone: (571)272-1703 , Office: P/2817 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814, 2817, 2508 |
| Total Applications | 1671 |
| Issued Applications | 1258 |
| Pending Applications | 66 |
| Abandoned Applications | 373 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18735527
[patent_doc_number] => 11804268
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-31
[patent_title] => Methods of operating memory devices based on sub-block positions and related memory system
[patent_app_type] => utility
[patent_app_number] => 17/525934
[patent_app_country] => US
[patent_app_date] => 2021-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 49
[patent_figures_cnt] => 51
[patent_no_of_words] => 20049
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17525934
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/525934 | Methods of operating memory devices based on sub-block positions and related memory system | Nov 13, 2021 | Issued |
Array
(
[id] => 18360582
[patent_doc_number] => 20230142173
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-11
[patent_title] => Three Dimensional (3D) Memories with Multiple Resistive Change Elements per Cell and Corresponding Architectures
[patent_app_type] => utility
[patent_app_number] => 17/519828
[patent_app_country] => US
[patent_app_date] => 2021-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 73566
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 268
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17519828
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/519828 | Three dimensional (3D) memories with multiple resistive change elements per cell and corresponding architectures | Nov 4, 2021 | Issued |
Array
(
[id] => 18833592
[patent_doc_number] => 20230402119
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/250486
[patent_app_country] => US
[patent_app_date] => 2021-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10095
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18250486
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/250486 | Semiconductor device | Oct 26, 2021 | Issued |
Array
(
[id] => 19444255
[patent_doc_number] => 12094541
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-17
[patent_title] => Memory system
[patent_app_type] => utility
[patent_app_number] => 17/452463
[patent_app_country] => US
[patent_app_date] => 2021-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 41
[patent_figures_cnt] => 42
[patent_no_of_words] => 39617
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 262
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452463
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/452463 | Memory system | Oct 26, 2021 | Issued |
Array
(
[id] => 19095585
[patent_doc_number] => 11957069
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Contact resistance of a metal liner in a phase change memory cell
[patent_app_type] => utility
[patent_app_number] => 17/451861
[patent_app_country] => US
[patent_app_date] => 2021-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 14395
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17451861
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/451861 | Contact resistance of a metal liner in a phase change memory cell | Oct 21, 2021 | Issued |
Array
(
[id] => 18168910
[patent_doc_number] => 20230035521
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-02
[patent_title] => SOLID STATE DISK DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/504446
[patent_app_country] => US
[patent_app_date] => 2021-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1845
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504446
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/504446 | Solid state disk device | Oct 17, 2021 | Issued |
Array
(
[id] => 18073792
[patent_doc_number] => 11532633
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-20
[patent_title] => Dual port memory cell with improved access resistance
[patent_app_type] => utility
[patent_app_number] => 17/491201
[patent_app_country] => US
[patent_app_date] => 2021-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 6738
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17491201
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/491201 | Dual port memory cell with improved access resistance | Sep 29, 2021 | Issued |
Array
(
[id] => 18125804
[patent_doc_number] => 20230011421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => SELECTOR AND MEMORY DEVICE USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/480699
[patent_app_country] => US
[patent_app_date] => 2021-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5944
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480699
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/480699 | Selector and memory device using the same | Sep 20, 2021 | Issued |
Array
(
[id] => 18357662
[patent_doc_number] => 11646068
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-09
[patent_title] => Memory controller and operating method thereof
[patent_app_type] => utility
[patent_app_number] => 17/477358
[patent_app_country] => US
[patent_app_date] => 2021-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 46
[patent_figures_cnt] => 49
[patent_no_of_words] => 46222
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17477358
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/477358 | Memory controller and operating method thereof | Sep 15, 2021 | Issued |
Array
(
[id] => 17485660
[patent_doc_number] => 20220093164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-24
[patent_title] => BIT LINE SENSE CIRCUIT AND MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/476583
[patent_app_country] => US
[patent_app_date] => 2021-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5377
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17476583
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/476583 | Bit line sense circuit and memory | Sep 15, 2021 | Issued |
Array
(
[id] => 18671875
[patent_doc_number] => 11778808
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-03
[patent_title] => Semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 17/472902
[patent_app_country] => US
[patent_app_date] => 2021-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 68
[patent_no_of_words] => 12287
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472902
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/472902 | Semiconductor memory device | Sep 12, 2021 | Issued |
Array
(
[id] => 18174204
[patent_doc_number] => 11573916
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-07
[patent_title] => Apparatuses and methods for writing data to a memory
[patent_app_type] => utility
[patent_app_number] => 17/447347
[patent_app_country] => US
[patent_app_date] => 2021-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8478
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447347
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/447347 | Apparatuses and methods for writing data to a memory | Sep 9, 2021 | Issued |
Array
(
[id] => 17956164
[patent_doc_number] => 11482277
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-25
[patent_title] => Integrated circuit device including a word line driving circuit
[patent_app_type] => utility
[patent_app_number] => 17/470641
[patent_app_country] => US
[patent_app_date] => 2021-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 11922
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 263
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470641
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/470641 | Integrated circuit device including a word line driving circuit | Sep 8, 2021 | Issued |
Array
(
[id] => 17854907
[patent_doc_number] => 20220284950
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => COMPUTATION UNIT INCLUDING AN ASYMMETRIC FERROELECTRIC DEVICE PAIR AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/470216
[patent_app_country] => US
[patent_app_date] => 2021-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10133
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470216
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/470216 | Computation unit including an asymmetric ferroelectric device pair and methods of forming the same | Sep 8, 2021 | Issued |
Array
(
[id] => 19720082
[patent_doc_number] => 12205625
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Semiconductor device and electronic device
[patent_app_type] => utility
[patent_app_number] => 18/245098
[patent_app_country] => US
[patent_app_date] => 2021-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 62
[patent_no_of_words] => 53153
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18245098
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/245098 | Semiconductor device and electronic device | Sep 6, 2021 | Issued |
Array
(
[id] => 18723436
[patent_doc_number] => 11800815
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-24
[patent_title] => Resistive random access memory cell and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/465840
[patent_app_country] => US
[patent_app_date] => 2021-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 3356
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465840
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/465840 | Resistive random access memory cell and method of fabricating the same | Sep 1, 2021 | Issued |
Array
(
[id] => 17508808
[patent_doc_number] => 20220101911
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-31
[patent_title] => NONVOLATILE MEMORY DEVICE, SYSTEM INCLUDING THE SAME AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/465539
[patent_app_country] => US
[patent_app_date] => 2021-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11896
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465539
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/465539 | Nonvolatile memory device, system including the same and method for fabricating the same | Sep 1, 2021 | Issued |
Array
(
[id] => 17295468
[patent_doc_number] => 20210391307
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-16
[patent_title] => THREE-DIMENSIONAL MEMORY DEVICE WITH THREE-DIMENSIONAL PHASE-CHANGE MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/459339
[patent_app_country] => US
[patent_app_date] => 2021-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12503
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459339
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/459339 | Three-dimensional memory device with three-dimensional phase-change memory | Aug 26, 2021 | Issued |
Array
(
[id] => 18213538
[patent_doc_number] => 20230059803
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-23
[patent_title] => DRIVER SHARING BETWEEN BANKS OR PORTIONS OF BANKS OF MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/407822
[patent_app_country] => US
[patent_app_date] => 2021-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14393
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17407822
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/407822 | Driver sharing between banks or portions of banks of memory devices | Aug 19, 2021 | Issued |
Array
(
[id] => 18876627
[patent_doc_number] => 11864473
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Resistive random-access memory device and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/404934
[patent_app_country] => US
[patent_app_date] => 2021-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 2502
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404934
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/404934 | Resistive random-access memory device and method of fabricating the same | Aug 16, 2021 | Issued |