
Phat X. Cao
Examiner (ID: 7067)
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2508, 2817, 2814 |
| Total Applications | 1687 |
| Issued Applications | 1251 |
| Pending Applications | 92 |
| Abandoned Applications | 373 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11825002
[patent_doc_number] => 20170213939
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-27
[patent_title] => 'SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 15/414021
[patent_app_country] => US
[patent_app_date] => 2017-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6481
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15414021
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/414021 | SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SAME | Jan 23, 2017 | Abandoned |
Array
(
[id] => 11869698
[patent_doc_number] => 20170236984
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-17
[patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DEVICE PACKAGES'
[patent_app_type] => utility
[patent_app_number] => 15/413757
[patent_app_country] => US
[patent_app_date] => 2017-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 4500
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15413757
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/413757 | Semiconductor light emitting device packages | Jan 23, 2017 | Issued |
Array
(
[id] => 14429801
[patent_doc_number] => 10319714
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-06-11
[patent_title] => Drain-extended metal-oxide-semiconductor bipolar switch for electrical overstress protection
[patent_app_type] => utility
[patent_app_number] => 15/413825
[patent_app_country] => US
[patent_app_date] => 2017-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 8948
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15413825
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/413825 | Drain-extended metal-oxide-semiconductor bipolar switch for electrical overstress protection | Jan 23, 2017 | Issued |
Array
(
[id] => 12243461
[patent_doc_number] => 20180076324
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-15
[patent_title] => 'METHOD OF CONTACT FORMATION BETWEEN METAL AND SEMICONDUCTOR'
[patent_app_type] => utility
[patent_app_number] => 15/414080
[patent_app_country] => US
[patent_app_date] => 2017-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2662
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15414080
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/414080 | METHOD OF CONTACT FORMATION BETWEEN METAL AND SEMICONDUCTOR | Jan 23, 2017 | Abandoned |
Array
(
[id] => 12416787
[patent_doc_number] => 09972542
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-05-15
[patent_title] => Hybrid-channel nano-sheet FETs
[patent_app_type] => utility
[patent_app_number] => 15/398232
[patent_app_country] => US
[patent_app_date] => 2017-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 5524
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398232
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/398232 | Hybrid-channel nano-sheet FETs | Jan 3, 2017 | Issued |
Array
(
[id] => 12896848
[patent_doc_number] => 20180190791
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-05
[patent_title] => TRANSIENT VOLTAGE SUPPRESSION DEVICES WITH SYMMETRIC BREAKDOWN CHARACTERISTICS
[patent_app_type] => utility
[patent_app_number] => 15/398489
[patent_app_country] => US
[patent_app_date] => 2017-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6232
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398489
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/398489 | Transient voltage suppression devices with symmetric breakdown characteristics | Jan 3, 2017 | Issued |
Array
(
[id] => 11732864
[patent_doc_number] => 20170194307
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-06
[patent_title] => 'LIGHT EMITTING DIODE SUBSTRATE AND DISPLAY APPARATUS APPLYING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/398374
[patent_app_country] => US
[patent_app_date] => 2017-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8021
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398374
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/398374 | Light emitting diode substrate and display apparatus applying the same | Jan 3, 2017 | Issued |
Array
(
[id] => 13121243
[patent_doc_number] => 10078976
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-18
[patent_title] => Display device
[patent_app_type] => utility
[patent_app_number] => 15/398162
[patent_app_country] => US
[patent_app_date] => 2017-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7459
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398162
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/398162 | Display device | Jan 3, 2017 | Issued |
Array
(
[id] => 12895747
[patent_doc_number] => 20180190424
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-05
[patent_title] => PHYSICAL DESIGN IN MAGNETIC ENVIRONMENT
[patent_app_type] => utility
[patent_app_number] => 15/398241
[patent_app_country] => US
[patent_app_date] => 2017-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5048
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398241
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/398241 | Physical design in magnetic environment | Jan 3, 2017 | Issued |
Array
(
[id] => 11869497
[patent_doc_number] => 20170236782
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-17
[patent_title] => 'SEMICONDUCTOR MODULE MANUFACTURING METHOD AND SEMICONDUCTOR MODULE'
[patent_app_type] => utility
[patent_app_number] => 15/398466
[patent_app_country] => US
[patent_app_date] => 2017-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 9967
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398466
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/398466 | Semiconductor module having outflow prevention external terminals | Jan 3, 2017 | Issued |
Array
(
[id] => 11732987
[patent_doc_number] => 20170194430
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-06
[patent_title] => 'METHOD FOR FABRICATING NANOWIRES FOR HORIZONTAL GATE ALL AROUND DEVICES FOR SEMICONDUCTOR APPLICATIONS'
[patent_app_type] => utility
[patent_app_number] => 15/395928
[patent_app_country] => US
[patent_app_date] => 2016-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 12571
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15395928
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/395928 | METHOD FOR FABRICATING NANOWIRES FOR HORIZONTAL GATE ALL AROUND DEVICES FOR SEMICONDUCTOR APPLICATIONS | Dec 29, 2016 | Abandoned |
Array
(
[id] => 12223546
[patent_doc_number] => 20180061906
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-01
[patent_title] => 'DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/394124
[patent_app_country] => US
[patent_app_date] => 2016-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7635
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15394124
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/394124 | Display device | Dec 28, 2016 | Issued |
Array
(
[id] => 11673759
[patent_doc_number] => 20170162482
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-08
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/366396
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8481
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366396
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366396 | SEMICONDUCTOR DEVICE | Nov 30, 2016 | Abandoned |
Array
(
[id] => 11990251
[patent_doc_number] => 20170294407
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-12
[patent_title] => 'PASSIVE ELEMENT PACKAGE AND SEMICONDUCTOR MODULE COMPRISING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/366484
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 10573
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366484
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366484 | PASSIVE ELEMENT PACKAGE AND SEMICONDUCTOR MODULE COMPRISING THE SAME | Nov 30, 2016 | Abandoned |
Array
(
[id] => 12181779
[patent_doc_number] => 20180040715
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-08
[patent_title] => 'Metal Gate Formation Through Etch Back Process'
[patent_app_type] => utility
[patent_app_number] => 15/366268
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 5717
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366268
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366268 | Metal gate formation through etch back process | Nov 30, 2016 | Issued |
Array
(
[id] => 11694387
[patent_doc_number] => 20170170104
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-15
[patent_title] => 'WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/366530
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5536
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366530
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366530 | Wiring substrate and semiconductor device | Nov 30, 2016 | Issued |
Array
(
[id] => 15984805
[patent_doc_number] => 10672741
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-02
[patent_title] => Semiconductor packages with thermal-electrical-mechanical chips and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 15/366654
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 25
[patent_no_of_words] => 10213
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 539
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366654
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366654 | Semiconductor packages with thermal-electrical-mechanical chips and methods of forming the same | Nov 30, 2016 | Issued |
Array
(
[id] => 12012667
[patent_doc_number] => 09805988
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-10-31
[patent_title] => 'Method of forming semiconductor structure including suspended semiconductor layer and resulting structure'
[patent_app_type] => utility
[patent_app_number] => 15/366514
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 6829
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366514
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366514 | Method of forming semiconductor structure including suspended semiconductor layer and resulting structure | Nov 30, 2016 | Issued |
Array
(
[id] => 11694483
[patent_doc_number] => 20170170200
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-15
[patent_title] => 'DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/366255
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 44
[patent_figures_cnt] => 44
[patent_no_of_words] => 34332
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366255
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366255 | Display device | Nov 30, 2016 | Issued |
Array
(
[id] => 11673798
[patent_doc_number] => 20170162520
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-08
[patent_title] => 'LEAD FRAME, ELECTRONIC COMPONENT DEVICE, AND METHODS OF MANUFACTURING THEM'
[patent_app_type] => utility
[patent_app_number] => 15/365281
[patent_app_country] => US
[patent_app_date] => 2016-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 13299
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15365281
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/365281 | LEAD FRAME, ELECTRONIC COMPONENT DEVICE, AND METHODS OF MANUFACTURING THEM | Nov 29, 2016 | Abandoned |