
Phat X. Cao
Examiner (ID: 4407, Phone: (571)272-1703 , Office: P/2817 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814, 2817, 2508 |
| Total Applications | 1671 |
| Issued Applications | 1258 |
| Pending Applications | 66 |
| Abandoned Applications | 373 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16536282
[patent_doc_number] => 10878895
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-29
[patent_title] => Semiconductor memory device which stores plural data in a cell
[patent_app_type] => utility
[patent_app_number] => 16/857611
[patent_app_country] => US
[patent_app_date] => 2020-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 61
[patent_figures_cnt] => 105
[patent_no_of_words] => 38520
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16857611
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/857611 | Semiconductor memory device which stores plural data in a cell | Apr 23, 2020 | Issued |
Array
(
[id] => 17283916
[patent_doc_number] => 11200956
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-14
[patent_title] => Read level calibration in memory devices using embedded servo cells
[patent_app_type] => utility
[patent_app_number] => 16/856587
[patent_app_country] => US
[patent_app_date] => 2020-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6408
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856587
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/856587 | Read level calibration in memory devices using embedded servo cells | Apr 22, 2020 | Issued |
Array
(
[id] => 16578427
[patent_doc_number] => 20210012828
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-14
[patent_title] => VERTICAL MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/854382
[patent_app_country] => US
[patent_app_date] => 2020-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19364
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854382
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/854382 | Vertical memory device | Apr 20, 2020 | Issued |
Array
(
[id] => 17173824
[patent_doc_number] => 20210327495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-21
[patent_title] => IN-MEMORY COMPUTING USING A STATIC RANDOM-ACCESS MEMORY (SRAM)
[patent_app_type] => utility
[patent_app_number] => 16/850492
[patent_app_country] => US
[patent_app_date] => 2020-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5450
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16850492
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/850492 | In-memory computing using a static random-access memory (SRAM) | Apr 15, 2020 | Issued |
Array
(
[id] => 16811800
[patent_doc_number] => 20210134355
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-06
[patent_title] => SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/848304
[patent_app_country] => US
[patent_app_date] => 2020-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10313
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848304
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/848304 | Semiconductor memory device | Apr 13, 2020 | Issued |
Array
(
[id] => 16593642
[patent_doc_number] => 10902918
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-26
[patent_title] => Semiconductor storage device
[patent_app_type] => utility
[patent_app_number] => 16/842633
[patent_app_country] => US
[patent_app_date] => 2020-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 25
[patent_no_of_words] => 13662
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16842633
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/842633 | Semiconductor storage device | Apr 6, 2020 | Issued |
Array
(
[id] => 16987796
[patent_doc_number] => 11074975
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-07-27
[patent_title] => Non-volatile register and implementation of non-volatile register
[patent_app_type] => utility
[patent_app_number] => 16/841711
[patent_app_country] => US
[patent_app_date] => 2020-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 3853
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16841711
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/841711 | Non-volatile register and implementation of non-volatile register | Apr 6, 2020 | Issued |
Array
(
[id] => 16677014
[patent_doc_number] => 20210065780
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-04
[patent_title] => MEMORY CONTROLLER AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/841030
[patent_app_country] => US
[patent_app_date] => 2020-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20967
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16841030
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/841030 | Memory controller and operating method thereof | Apr 5, 2020 | Issued |
Array
(
[id] => 16502292
[patent_doc_number] => 10867686
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-15
[patent_title] => Semiconductor memory device for storing multivalued data
[patent_app_type] => utility
[patent_app_number] => 16/840615
[patent_app_country] => US
[patent_app_date] => 2020-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 52
[patent_figures_cnt] => 92
[patent_no_of_words] => 28714
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 258
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16840615
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/840615 | Semiconductor memory device for storing multivalued data | Apr 5, 2020 | Issued |
Array
(
[id] => 16193922
[patent_doc_number] => 20200234771
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-23
[patent_title] => METHODS OF OPERATING MEMORY DEVICES BASED ON SUB-BLOCK POSITIONS AND RELATED MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/840290
[patent_app_country] => US
[patent_app_date] => 2020-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14850
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16840290
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/840290 | Methods of operating memory devices based on sub-block positions and related memory system | Apr 2, 2020 | Issued |
Array
(
[id] => 16973406
[patent_doc_number] => 11069385
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-07-20
[patent_title] => Integrated assemblies comprising folded-digit-line-configurations
[patent_app_type] => utility
[patent_app_number] => 16/835797
[patent_app_country] => US
[patent_app_date] => 2020-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 6954
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835797
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/835797 | Integrated assemblies comprising folded-digit-line-configurations | Mar 30, 2020 | Issued |
Array
(
[id] => 17130053
[patent_doc_number] => 20210304822
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => PEAK AND AVERAGE CURRENT REDUCTION FOR SUB BLOCK MEMORY OPERATION
[patent_app_type] => utility
[patent_app_number] => 16/832293
[patent_app_country] => US
[patent_app_date] => 2020-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14869
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16832293
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/832293 | Peak and average current reduction for sub block memory operation | Mar 26, 2020 | Issued |
Array
(
[id] => 17130615
[patent_doc_number] => 20210305384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => THREE-DIMENSIONAL MEMORY DEVICE CONTAINING INTER-SELECT-GATE ELECTRODES AND METHODS OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/828129
[patent_app_country] => US
[patent_app_date] => 2020-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19372
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16828129
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/828129 | Three-dimensional memory device containing inter-select-gate electrodes and methods of making the same | Mar 23, 2020 | Issued |
Array
(
[id] => 17410288
[patent_doc_number] => 11251186
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-15
[patent_title] => Compute near memory with backend memory
[patent_app_type] => utility
[patent_app_number] => 16/827542
[patent_app_country] => US
[patent_app_date] => 2020-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 14531
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16827542
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/827542 | Compute near memory with backend memory | Mar 22, 2020 | Issued |
Array
(
[id] => 16536265
[patent_doc_number] => 10878878
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-29
[patent_title] => Protocol for memory power-mode control
[patent_app_type] => utility
[patent_app_number] => 16/825247
[patent_app_country] => US
[patent_app_date] => 2020-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4504
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16825247
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/825247 | Protocol for memory power-mode control | Mar 19, 2020 | Issued |
Array
(
[id] => 16987776
[patent_doc_number] => 11074955
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-27
[patent_title] => Cell voltage accumulation discharge
[patent_app_type] => utility
[patent_app_number] => 16/825832
[patent_app_country] => US
[patent_app_date] => 2020-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 15264
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16825832
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/825832 | Cell voltage accumulation discharge | Mar 19, 2020 | Issued |
Array
(
[id] => 17063776
[patent_doc_number] => 11108395
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-31
[patent_title] => Memory cell and memory cell array of magnetoresistive random access memory operated by negative voltage
[patent_app_type] => utility
[patent_app_number] => 16/822983
[patent_app_country] => US
[patent_app_date] => 2020-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4460
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16822983
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/822983 | Memory cell and memory cell array of magnetoresistive random access memory operated by negative voltage | Mar 17, 2020 | Issued |
Array
(
[id] => 16119181
[patent_doc_number] => 20200211613
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-02
[patent_title] => FERROELECTRIC MEMORY PLATE POWER REDUCTION
[patent_app_type] => utility
[patent_app_number] => 16/813319
[patent_app_country] => US
[patent_app_date] => 2020-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16096
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16813319
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/813319 | Ferroelectric memory plate power reduction | Mar 8, 2020 | Issued |
Array
(
[id] => 17018209
[patent_doc_number] => 11087854
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-08-10
[patent_title] => High current fast read scheme for crosspoint memory
[patent_app_type] => utility
[patent_app_number] => 16/810127
[patent_app_country] => US
[patent_app_date] => 2020-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 8406
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810127
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/810127 | High current fast read scheme for crosspoint memory | Mar 4, 2020 | Issued |
Array
(
[id] => 18073939
[patent_doc_number] => 11532783
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-20
[patent_title] => Magnetic recording array, neuromorphic device, and method of controlling magnetic recording array
[patent_app_type] => utility
[patent_app_number] => 17/269056
[patent_app_country] => US
[patent_app_date] => 2020-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8897
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17269056
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/269056 | Magnetic recording array, neuromorphic device, and method of controlling magnetic recording array | Mar 4, 2020 | Issued |