Search

Phat X. Cao

Examiner (ID: 4407, Phone: (571)272-1703 , Office: P/2817 )

Most Active Art Unit
2814
Art Unit(s)
2814, 2817, 2508
Total Applications
1671
Issued Applications
1258
Pending Applications
66
Abandoned Applications
373

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16308455 [patent_doc_number] => 10777260 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-15 [patent_title] => Static random access memory [patent_app_type] => utility [patent_app_number] => 16/655220 [patent_app_country] => US [patent_app_date] => 2019-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1932 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16655220 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/655220
Static random access memory Oct 15, 2019 Issued
Array ( [id] => 16264320 [patent_doc_number] => 10755761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Semiconductor device and system [patent_app_type] => utility [patent_app_number] => 16/653744 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9053 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16653744 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/653744
Semiconductor device and system Oct 14, 2019 Issued
Array ( [id] => 16356712 [patent_doc_number] => 10797230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Techniques for MRAM MTJ top electrode to metal layer interface including spacer [patent_app_type] => utility [patent_app_number] => 16/580419 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6344 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16580419 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/580419
Techniques for MRAM MTJ top electrode to metal layer interface including spacer Sep 23, 2019 Issued
Array ( [id] => 17516834 [patent_doc_number] => 11295995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Testing SRAM structures [patent_app_type] => utility [patent_app_number] => 16/572769 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572769 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572769
Testing SRAM structures Sep 16, 2019 Issued
Array ( [id] => 17802052 [patent_doc_number] => 11416353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-16 [patent_title] => DIMM voltage regulator soft start-up for power fault detection [patent_app_type] => utility [patent_app_number] => 16/569740 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6292 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569740 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569740
DIMM voltage regulator soft start-up for power fault detection Sep 12, 2019 Issued
Array ( [id] => 16677016 [patent_doc_number] => 20210065782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => APPARATUSES AND METHODS FOR DEACTIVATING A DELAY LOCKED LOOP UPDATE IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/559344 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7481 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16559344 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/559344
Apparatuses and methods for deactivating a delay locked loop update in semiconductor devices Sep 2, 2019 Issued
Array ( [id] => 16502257 [patent_doc_number] => 10867650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Magnetic storage device [patent_app_type] => utility [patent_app_number] => 16/559204 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16559204 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/559204
Magnetic storage device Sep 2, 2019 Issued
Array ( [id] => 15217365 [patent_doc_number] => 20190371369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => METHOD FOR CONTROLLING OPERATIONS OF MEMORY DEVICE, ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF, AND ASSOCIATED ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/540065 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8870 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540065 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/540065
Method for controlling operations of memory device, associated memory device and controller thereof, and associated electronic device Aug 13, 2019 Issued
Array ( [id] => 15597161 [patent_doc_number] => 20200075115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/540788 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540788 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/540788
Semiconductor device Aug 13, 2019 Issued
Array ( [id] => 16738702 [patent_doc_number] => 10964363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Delay tracking method and memory system [patent_app_type] => utility [patent_app_number] => 16/540156 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3177 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540156 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/540156
Delay tracking method and memory system Aug 13, 2019 Issued
Array ( [id] => 16495503 [patent_doc_number] => 10861550 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-08 [patent_title] => Flash memory cell adapted for low voltage and/or non-volatile performance [patent_app_type] => utility [patent_app_number] => 16/540170 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 7483 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540170 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/540170
Flash memory cell adapted for low voltage and/or non-volatile performance Aug 13, 2019 Issued
Array ( [id] => 16132029 [patent_doc_number] => 10699781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Semiconductor memory device which stores plural data in a cell [patent_app_type] => utility [patent_app_number] => 16/539205 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 105 [patent_no_of_words] => 38509 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16539205 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/539205
Semiconductor memory device which stores plural data in a cell Aug 12, 2019 Issued
Array ( [id] => 15856773 [patent_doc_number] => 10643679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Write level arbiter circuitry [patent_app_type] => utility [patent_app_number] => 16/537046 [patent_app_country] => US [patent_app_date] => 2019-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5828 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16537046 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/537046
Write level arbiter circuitry Aug 8, 2019 Issued
Array ( [id] => 15184411 [patent_doc_number] => 20190362797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE FOR STORING MULTIVALUED DATA [patent_app_type] => utility [patent_app_number] => 16/534397 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 529 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16534397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/534397
Semiconductor memory device for storing multivalued data Aug 6, 2019 Issued
Array ( [id] => 16889218 [patent_doc_number] => 20210175415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => Non-Volatile Memory Cell [patent_app_type] => utility [patent_app_number] => 17/265853 [patent_app_country] => US [patent_app_date] => 2019-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17265853 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/265853
Non-volatile memory cell Aug 5, 2019 Issued
Array ( [id] => 15151925 [patent_doc_number] => 20190354440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => POWER-LOSS PROTECTION [patent_app_type] => utility [patent_app_number] => 16/532014 [patent_app_country] => US [patent_app_date] => 2019-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16532014 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/532014
Power-loss protection Aug 4, 2019 Issued
Array ( [id] => 15760213 [patent_doc_number] => 10622234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Micro elements transfer device and method [patent_app_type] => utility [patent_app_number] => 16/522641 [patent_app_country] => US [patent_app_date] => 2019-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 7906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16522641 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/522641
Micro elements transfer device and method Jul 24, 2019 Issued
Array ( [id] => 15092611 [patent_doc_number] => 20190341117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => PERFORMING AN OPERATION ON A MEMORY CELL OF A MEMORY SYSTEM AT A FREQUENCY BASED ON TEMPERATURE [patent_app_type] => utility [patent_app_number] => 16/514861 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514861
Performing an operation on a memory cell of a memory system at a frequency based on temperature Jul 16, 2019 Issued
Array ( [id] => 16521426 [patent_doc_number] => 10872649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Memory device configured to perform asymmetric write operation according to write direction [patent_app_type] => utility [patent_app_number] => 16/507536 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 8372 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507536 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507536
Memory device configured to perform asymmetric write operation according to write direction Jul 9, 2019 Issued
Array ( [id] => 16566643 [patent_doc_number] => 10892017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Memory device and a storage system using the same [patent_app_type] => utility [patent_app_number] => 16/508016 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508016 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508016
Memory device and a storage system using the same Jul 9, 2019 Issued
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