Search

Phat X. Cao

Examiner (ID: 4407, Phone: (571)272-1703 , Office: P/2817 )

Most Active Art Unit
2814
Art Unit(s)
2814, 2817, 2508
Total Applications
1671
Issued Applications
1258
Pending Applications
66
Abandoned Applications
373

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5925245 [patent_doc_number] => 20110037094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-17 [patent_title] => 'SEMICONDUCTOR CHIP ASSEMBLY WITH BUMP/BASE HEAT SPREADER AND CAVITY IN BUMP' [patent_app_type] => utility [patent_app_number] => 12/911729 [patent_app_country] => US [patent_app_date] => 2010-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 50 [patent_no_of_words] => 29241 [patent_no_of_claims] => 85 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20110037094.pdf [firstpage_image] =>[orig_patent_app_number] => 12911729 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/911729
Semiconductor chip assembly with bump/base heat spreader and cavity in bump Oct 25, 2010 Issued
Array ( [id] => 8151996 [patent_doc_number] => 08168482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-01 [patent_title] => 'Semiconductor device, an electronic device and an electronic apparatus' [patent_app_type] => utility [patent_app_number] => 12/897092 [patent_app_country] => US [patent_app_date] => 2010-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 13683 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/168/08168482.pdf [firstpage_image] =>[orig_patent_app_number] => 12897092 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/897092
Semiconductor device, an electronic device and an electronic apparatus Oct 3, 2010 Issued
Array ( [id] => 6096574 [patent_doc_number] => 20110003439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'SEMICONDUCTOR DEVICE PACKAGE HAVING FEATURES FORMED BY ELECTROPLATING' [patent_app_type] => utility [patent_app_number] => 12/882477 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6046 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20110003439.pdf [firstpage_image] =>[orig_patent_app_number] => 12882477 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882477
SEMICONDUCTOR DEVICE PACKAGE HAVING FEATURES FORMED BY ELECTROPLATING Sep 14, 2010 Abandoned
Array ( [id] => 7787689 [patent_doc_number] => 20120049245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'MEMORY ARRAY WITH AN AIR GAP BETWEEN MEMORY CELLS AND THE FORMATION THEREOF' [patent_app_type] => utility [patent_app_number] => 12/862107 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6122 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049245.pdf [firstpage_image] =>[orig_patent_app_number] => 12862107 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/862107
Memory array with an air gap between memory cells and the formation thereof Aug 23, 2010 Issued
Array ( [id] => 8933137 [patent_doc_number] => 08492839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-23 [patent_title] => 'Same-chip multicharacteristic semiconductor structures' [patent_app_type] => utility [patent_app_number] => 12/861976 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 8489 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12861976 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/861976
Same-chip multicharacteristic semiconductor structures Aug 23, 2010 Issued
Array ( [id] => 6021305 [patent_doc_number] => 20110049631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT HAVING INSULATED GATE FIELD EFFECT TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 12/862159 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6850 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20110049631.pdf [firstpage_image] =>[orig_patent_app_number] => 12862159 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/862159
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING INSULATED GATE FIELD EFFECT TRANSISTORS Aug 23, 2010 Abandoned
Array ( [id] => 9060482 [patent_doc_number] => 08546921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Hybrid multilayer substrate' [patent_app_type] => utility [patent_app_number] => 12/862068 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3344 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12862068 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/862068
Hybrid multilayer substrate Aug 23, 2010 Issued
Array ( [id] => 6114413 [patent_doc_number] => 20110073944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/861954 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8401 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20110073944.pdf [firstpage_image] =>[orig_patent_app_number] => 12861954 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/861954
Semiconductor device Aug 23, 2010 Issued
Array ( [id] => 7787739 [patent_doc_number] => 20120049295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'METHOD TO REDUCE THRESHOLD VOLTAGE VARIABILITY WITH THROUGH GATE WELL IMPLANT' [patent_app_type] => utility [patent_app_number] => 12/862048 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9269 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049295.pdf [firstpage_image] =>[orig_patent_app_number] => 12862048 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/862048
Method to reduce threshold voltage variability with through gate well implant Aug 23, 2010 Issued
Array ( [id] => 8665029 [patent_doc_number] => 08378491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Integrated circuit including interconnect levels' [patent_app_type] => utility [patent_app_number] => 12/861877 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3796 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12861877 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/861877
Integrated circuit including interconnect levels Aug 23, 2010 Issued
Array ( [id] => 8772307 [patent_doc_number] => 08426262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Stress adjustment in stressed dielectric materials of semiconductor devices by stress relaxation based on radiation' [patent_app_type] => utility [patent_app_number] => 12/862203 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 9112 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12862203 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/862203
Stress adjustment in stressed dielectric materials of semiconductor devices by stress relaxation based on radiation Aug 23, 2010 Issued
Array ( [id] => 6257343 [patent_doc_number] => 20100295607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-25 [patent_title] => 'SYSTEM AND METHOD TO REDUCE NOISE IN A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/849180 [patent_app_country] => US [patent_app_date] => 2010-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2704 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0295/20100295607.pdf [firstpage_image] =>[orig_patent_app_number] => 12849180 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/849180
SYSTEM AND METHOD TO REDUCE NOISE IN A SUBSTRATE Aug 2, 2010 Abandoned
Array ( [id] => 6464014 [patent_doc_number] => 20100284167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'SEPARATE OPTICAL DEVICE FOR DIRECTING LIGHT FROM AN LED' [patent_app_type] => utility [patent_app_number] => 12/788094 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20100284167.pdf [firstpage_image] =>[orig_patent_app_number] => 12788094 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788094
Separate optical device for directing light from an LED May 25, 2010 Issued
Array ( [id] => 6320758 [patent_doc_number] => 20100244102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'INTEGRATED CIRCUIT DEVICE AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/772604 [patent_app_country] => US [patent_app_date] => 2010-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 19206 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20100244102.pdf [firstpage_image] =>[orig_patent_app_number] => 12772604 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/772604
Integrated circuit device and method for forming the same May 2, 2010 Issued
Array ( [id] => 8968567 [patent_doc_number] => 08507377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-13 [patent_title] => 'Semiconductor device, method of manufacturing the same, and phase shift mask' [patent_app_type] => utility [patent_app_number] => 12/764210 [patent_app_country] => US [patent_app_date] => 2010-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 53 [patent_no_of_words] => 15572 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12764210 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/764210
Semiconductor device, method of manufacturing the same, and phase shift mask Apr 20, 2010 Issued
Array ( [id] => 6311347 [patent_doc_number] => 20100193934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'SEMICONDUCTOR DEVICE, A METHOD OF MANUFACTURING THE SAME AND AN ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 12/759008 [patent_app_country] => US [patent_app_date] => 2010-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 14276 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20100193934.pdf [firstpage_image] =>[orig_patent_app_number] => 12759008 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/759008
Semiconductor device having a sealing body and partially exposed conductors Apr 12, 2010 Issued
Array ( [id] => 9971653 [patent_doc_number] => 09018667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'Semiconductor chip assembly with post/base heat spreader and dual adhesives' [patent_app_type] => utility [patent_app_number] => 12/758040 [patent_app_country] => US [patent_app_date] => 2010-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 42 [patent_no_of_words] => 20557 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12758040 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/758040
Semiconductor chip assembly with post/base heat spreader and dual adhesives Apr 11, 2010 Issued
Array ( [id] => 6311070 [patent_doc_number] => 20100193840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'SUBSTRATE BAND GAP ENGINEERED MULTI-GATE PMOS DEVICES' [patent_app_type] => utility [patent_app_number] => 12/757917 [patent_app_country] => US [patent_app_date] => 2010-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5058 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20100193840.pdf [firstpage_image] =>[orig_patent_app_number] => 12757917 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/757917
Substrate band gap engineered multi-gate pMOS devices Apr 8, 2010 Issued
Array ( [id] => 4514887 [patent_doc_number] => 07932121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Semiconductor device and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 12/749440 [patent_app_country] => US [patent_app_date] => 2010-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 15614 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/932/07932121.pdf [firstpage_image] =>[orig_patent_app_number] => 12749440 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/749440
Semiconductor device and manufacturing method of the same Mar 28, 2010 Issued
Array ( [id] => 6183941 [patent_doc_number] => 20110169016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-14 [patent_title] => 'MOSFET AND METHOD FOR MANUFACTURING MOSFET' [patent_app_type] => utility [patent_app_number] => 13/063298 [patent_app_country] => US [patent_app_date] => 2010-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7223 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20110169016.pdf [firstpage_image] =>[orig_patent_app_number] => 13063298 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/063298
MOSFET and method for manufacturing MOSFET Mar 22, 2010 Issued
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