Search

Phat X. Cao

Examiner (ID: 4407, Phone: (571)272-1703 , Office: P/2817 )

Most Active Art Unit
2814
Art Unit(s)
2814, 2817, 2508
Total Applications
1671
Issued Applications
1258
Pending Applications
66
Abandoned Applications
373

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18865577 [patent_doc_number] => 20230420014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => COMPUTING IN MEMORY ELECTRONIC DEVICE CAPABLE OF SUPPORTING CURRENT BASED ANALOG MULTIPLY-ACCUMULATION OPERATIONS AND TIME BASED ANALOG-TO-DIGITAL CONVERSION [patent_app_type] => utility [patent_app_number] => 17/987072 [patent_app_country] => US [patent_app_date] => 2022-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6176 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17987072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/987072
Computing in memory electronic device capable of supporting current based analog multiply-accumulation operations and time based analog-to-digital conversion Nov 14, 2022 Issued
Array ( [id] => 18865630 [patent_doc_number] => 20230420067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/053896 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18053896 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/053896
Memory system Nov 8, 2022 Issued
Array ( [id] => 18455852 [patent_doc_number] => 20230197133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => MEMORY ARRAY, MEMORY CELL, AND DATA READ AND WRITE METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/053898 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5662 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18053898 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/053898
Memory array, memory cell, and data read and write method thereof Nov 8, 2022 Issued
Array ( [id] => 18841494 [patent_doc_number] => 11849591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Power gating in a memory device [patent_app_type] => utility [patent_app_number] => 18/053966 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 14064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18053966 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/053966
Power gating in a memory device Nov 8, 2022 Issued
Array ( [id] => 20132095 [patent_doc_number] => 12374412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Under drive control circuit and semiconductor apparatus including the under drive control circuit [patent_app_type] => utility [patent_app_number] => 17/983038 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17983038 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/983038
Under drive control circuit and semiconductor apparatus including the under drive control circuit Nov 7, 2022 Issued
Array ( [id] => 18270728 [patent_doc_number] => 20230091970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => DUAL PORT MEMORY CELL WITH IMPROVED ACCESS RESISTANCE [patent_app_type] => utility [patent_app_number] => 18/052514 [patent_app_country] => US [patent_app_date] => 2022-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18052514 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/052514
Dual port memory cell with improved access resistance Nov 2, 2022 Issued
Array ( [id] => 19487096 [patent_doc_number] => 12106820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Single column select architecture for sense amplifier circuity [patent_app_type] => utility [patent_app_number] => 17/975300 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8673 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975300 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/975300
Single column select architecture for sense amplifier circuity Oct 26, 2022 Issued
Array ( [id] => 18874409 [patent_doc_number] => 11862230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Non-volatile memory device and control method [patent_app_type] => utility [patent_app_number] => 17/965527 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965527
Non-volatile memory device and control method Oct 12, 2022 Issued
Array ( [id] => 18185028 [patent_doc_number] => 20230045758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => Semiconductor Memory Having Both Volatile and Non-Volatile Functionality and Method of Operating [patent_app_type] => utility [patent_app_number] => 17/960441 [patent_app_country] => US [patent_app_date] => 2022-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960441 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960441
Semiconductor memory having both volatile and non-volatile functionality and method of operating Oct 4, 2022 Issued
Array ( [id] => 19085943 [patent_doc_number] => 20240112744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => HIGH PERFORMANCE VERIFY TECHNIQUES IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/957606 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957606 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/957606
High performance verify techniques in a memory device Sep 29, 2022 Issued
Array ( [id] => 18455863 [patent_doc_number] => 20230197144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => ADAPTIVE CONTROL CIRCUIT OF STATIC RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/936559 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936559 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936559
Adaptive control circuit of static random access memory Sep 28, 2022 Issued
Array ( [id] => 18140743 [patent_doc_number] => 20230014583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => INTEGRATED CIRCUIT DEVICE INCLUDING A WORD LINE DRIVING CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/935121 [patent_app_country] => US [patent_app_date] => 2022-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11937 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17935121 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/935121
Integrated circuit device including a word line driving circuit Sep 24, 2022 Issued
Array ( [id] => 18145684 [patent_doc_number] => 20230019540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE, OPERATING METHOD OF THE SAME AND ELECTRONIC SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/951591 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951591 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951591
Three-dimensional semiconductor memory device, operating method of the same and electronic system including the same Sep 22, 2022 Issued
Array ( [id] => 18651422 [patent_doc_number] => 20230297258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/939848 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939848
Memory system Sep 6, 2022 Issued
Array ( [id] => 18081391 [patent_doc_number] => 20220407003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => INFORMATION PROCESSING DEVICE AND METHOD OF DRIVING INFORMATION PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 17/896213 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17896213 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/896213
Information processing device and method of driving information processing device Aug 25, 2022 Issued
Array ( [id] => 19812183 [patent_doc_number] => 12243591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => In-place write techniques without erase in a memory device [patent_app_type] => utility [patent_app_number] => 17/896587 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 28 [patent_no_of_words] => 12584 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17896587 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/896587
In-place write techniques without erase in a memory device Aug 25, 2022 Issued
Array ( [id] => 18661038 [patent_doc_number] => 20230307051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/897089 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897089 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/897089
Semiconductor memory device Aug 25, 2022 Issued
Array ( [id] => 19427951 [patent_doc_number] => 12087379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Calibration of threshold voltage shift values [patent_app_type] => utility [patent_app_number] => 17/821608 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8287 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/821608
Calibration of threshold voltage shift values Aug 22, 2022 Issued
Array ( [id] => 18661060 [patent_doc_number] => 20230307073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD OF THE MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/890784 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890784 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/890784
Memory system and operating method of the memory system Aug 17, 2022 Issued
Array ( [id] => 20346088 [patent_doc_number] => 12469823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Repeater scheme for inter-die signals in multi-die package [patent_app_type] => utility [patent_app_number] => 17/887372 [patent_app_country] => US [patent_app_date] => 2022-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4783 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887372 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/887372
Repeater scheme for inter-die signals in multi-die package Aug 11, 2022 Issued
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