Search

Phi Hoang

Examiner (ID: 3622, Phone: (571)270-3417 , Office: P/2613 )

Most Active Art Unit
2613
Art Unit(s)
4178, 2678, 2613, 2619, 2628
Total Applications
1053
Issued Applications
820
Pending Applications
67
Abandoned Applications
177

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18977216 [patent_doc_number] => 20240057308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME [patent_app_type] => utility [patent_app_number] => 18/451089 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8028 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18451089 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/451089
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME Aug 15, 2023 Pending
Array ( [id] => 19040384 [patent_doc_number] => 20240090199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/233061 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8980 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233061 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/233061
SEMICONDUCTOR DEVICES Aug 10, 2023 Pending
Array ( [id] => 18791277 [patent_doc_number] => 20230380305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => PHASE CHANGE MEMORY DEVICE HAVING TAPERED PORTION OF THE BOTTOM MEMORY LAYER [patent_app_type] => utility [patent_app_number] => 18/362770 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10997 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362770 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362770
Phase change memory device having tapered portion of the bottom memory layer Jul 30, 2023 Issued
Array ( [id] => 19741401 [patent_doc_number] => 12218249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Semiconductor device comprising oxide semiconductor layer containing a c-axis aligned crystal [patent_app_type] => utility [patent_app_number] => 18/227361 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 52 [patent_no_of_words] => 20750 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227361 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227361
Semiconductor device comprising oxide semiconductor layer containing a c-axis aligned crystal Jul 27, 2023 Issued
Array ( [id] => 18961131 [patent_doc_number] => 20240049458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR DEVICES AND FABRICATING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/226159 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18226159 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/226159
SEMICONDUCTOR DEVICES AND FABRICATING METHODS THEREOF Jul 24, 2023 Pending
Array ( [id] => 19460211 [patent_doc_number] => 12100721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Solid-state image pickup device and electronic apparatus having a divided pixel separation wall [patent_app_type] => utility [patent_app_number] => 18/224691 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 21644 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224691 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224691
Solid-state image pickup device and electronic apparatus having a divided pixel separation wall Jul 20, 2023 Issued
Array ( [id] => 20540182 [patent_doc_number] => 12557269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/354648 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4763 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354648 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/354648
Semiconductor device Jul 18, 2023 Issued
Array ( [id] => 19567828 [patent_doc_number] => 12142609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Dummy fin between first and second semiconductor fins [patent_app_type] => utility [patent_app_number] => 18/354844 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 62 [patent_no_of_words] => 13167 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354844 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/354844
Dummy fin between first and second semiconductor fins Jul 18, 2023 Issued
Array ( [id] => 19386839 [patent_doc_number] => 20240276709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/354035 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354035 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/354035
SEMICONDUCTOR DEVICE INCLUDING TRANSISTOR Jul 17, 2023 Pending
Array ( [id] => 19244600 [patent_doc_number] => 12015055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Doping for semiconductor device with conductive feature [patent_app_type] => utility [patent_app_number] => 18/350838 [patent_app_country] => US [patent_app_date] => 2023-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 40 [patent_no_of_words] => 9715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18350838 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/350838
Doping for semiconductor device with conductive feature Jul 11, 2023 Issued
Array ( [id] => 20582824 [patent_doc_number] => 12575084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => Memory structure having a buried word line [patent_app_type] => utility [patent_app_number] => 18/220845 [patent_app_country] => US [patent_app_date] => 2023-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18220845 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/220845
Memory structure having a buried word line Jul 11, 2023 Issued
Array ( [id] => 19057016 [patent_doc_number] => 20240098985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/219229 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9059 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18219229 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/219229
Semiconductor device Jul 6, 2023 Issued
Array ( [id] => 18884906 [patent_doc_number] => 20240008275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => Integrated Assemblies Which Include Stacked Memory Decks, and Methods of Forming Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 18/218762 [patent_app_country] => US [patent_app_date] => 2023-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18218762 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/218762
Integrated assemblies which include stacked memory decks, and methods of forming integrated assemblies Jul 5, 2023 Issued
Array ( [id] => 18868033 [patent_doc_number] => 20230422470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHOD OF FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/213310 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7090 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213310 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/213310
Method of fabricating semiconductor device Jun 22, 2023 Issued
Array ( [id] => 19260932 [patent_doc_number] => 12020997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Methods of forming semiconductor device packages having alignment marks on a carrier substrate [patent_app_type] => utility [patent_app_number] => 18/338726 [patent_app_country] => US [patent_app_date] => 2023-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 44 [patent_no_of_words] => 10496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18338726 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/338726
Methods of forming semiconductor device packages having alignment marks on a carrier substrate Jun 20, 2023 Issued
Array ( [id] => 18900468 [patent_doc_number] => 20240015953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => DYNAMIC RANDOM ACCESS MEMORY AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/338026 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18338026 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/338026
DYNAMIC RANDOM ACCESS MEMORY AND METHOD FOR FORMING THE SAME Jun 19, 2023 Pending
Array ( [id] => 19010086 [patent_doc_number] => 20240074157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/336340 [patent_app_country] => US [patent_app_date] => 2023-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336340 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/336340
SEMICONDUCTOR DEVICES Jun 15, 2023 Pending
Array ( [id] => 18929282 [patent_doc_number] => 20240032286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => INTEGRATED CIRCUIT DEVICES [patent_app_type] => utility [patent_app_number] => 18/335186 [patent_app_country] => US [patent_app_date] => 2023-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18335186 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/335186
INTEGRATED CIRCUIT DEVICES Jun 14, 2023 Pending
Array ( [id] => 18823052 [patent_doc_number] => 20230397393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/207689 [patent_app_country] => US [patent_app_date] => 2023-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18207689 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/207689
Semiconductor device including gate structure having first portion and second portion and method for manufacturing the same Jun 8, 2023 Issued
Array ( [id] => 18682386 [patent_doc_number] => 20230320063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => MEMORY DEVICE, SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/329615 [patent_app_country] => US [patent_app_date] => 2023-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18329615 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/329615
Method for manufacturing semiconductor structure having growth rate on conductive layer greater than on dielectric layer Jun 5, 2023 Issued
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