Search

Phil K. Nguyen

Examiner (ID: 874, Phone: (571)270-3356 , Office: P/2118 )

Most Active Art Unit
2187
Art Unit(s)
2115, 2187, 2118, 2176
Total Applications
639
Issued Applications
514
Pending Applications
43
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20375611 [patent_doc_number] => 12483056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Charging system for prioritized power distribution and dynamic power adjustment [patent_app_type] => utility [patent_app_number] => 18/899243 [patent_app_country] => US [patent_app_date] => 2024-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 2302 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18899243 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/899243
Charging system for prioritized power distribution and dynamic power adjustment Sep 26, 2024 Issued
Array ( [id] => 20249564 [patent_doc_number] => 20250298433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => CLOCK AND DATA RECOVERY CIRCUIT MODULE, MEMORY STORAGE DEVICE AND SIGNAL CALIBRATION METHOD [patent_app_type] => utility [patent_app_number] => 18/637397 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637397 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/637397
Clock and data recovery circuit module, memory storage device and signal calibration method Apr 15, 2024 Issued
Array ( [id] => 19405416 [patent_doc_number] => 20240288927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => DYNAMICALLY POWER ON/OFF PROCESSING CLUSTERS DURING EXECUTION [patent_app_type] => utility [patent_app_number] => 18/633932 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18633932 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/633932
DYNAMICALLY POWER ON/OFF PROCESSING CLUSTERS DURING EXECUTION Apr 11, 2024 Pending
Array ( [id] => 20296365 [patent_doc_number] => 20250321608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => LOCAL CLOCK DRIVEN DETUNE ON A CONTINUOUS CLOCK GRID [patent_app_type] => utility [patent_app_number] => 18/631284 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631284 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631284
LOCAL CLOCK DRIVEN DETUNE ON A CONTINUOUS CLOCK GRID Apr 9, 2024 Pending
Array ( [id] => 20296365 [patent_doc_number] => 20250321608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => LOCAL CLOCK DRIVEN DETUNE ON A CONTINUOUS CLOCK GRID [patent_app_type] => utility [patent_app_number] => 18/631284 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631284 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631284
LOCAL CLOCK DRIVEN DETUNE ON A CONTINUOUS CLOCK GRID Apr 9, 2024 Pending
Array ( [id] => 19779929 [patent_doc_number] => 12228961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Memory system using asymmetric source-synchronous clocking [patent_app_type] => utility [patent_app_number] => 18/629138 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 5788 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629138 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629138
Memory system using asymmetric source-synchronous clocking Apr 7, 2024 Issued
Array ( [id] => 20284832 [patent_doc_number] => 20250310074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => Environmental-based parameters optimization of clock [patent_app_type] => utility [patent_app_number] => 18/624169 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624169 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/624169
Environmental-based parameters optimization of clock Apr 1, 2024 Pending
Array ( [id] => 19481641 [patent_doc_number] => 20240329683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => NEURAL PROCESSOR, NEURAL PROCESSING DEVICE AND CLOCK GATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/612806 [patent_app_country] => US [patent_app_date] => 2024-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18612806 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/612806
Neural processor, neural processing device and clock gating method thereof Mar 20, 2024 Issued
Array ( [id] => 19235549 [patent_doc_number] => 20240192743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => CUSTOMIZED THERMAL AND POWER POLICIES IN COMPUTERS [patent_app_type] => utility [patent_app_number] => 18/581216 [patent_app_country] => US [patent_app_date] => 2024-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581216 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/581216
CUSTOMIZED THERMAL AND POWER POLICIES IN COMPUTERS Feb 18, 2024 Pending
Array ( [id] => 19235549 [patent_doc_number] => 20240192743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => CUSTOMIZED THERMAL AND POWER POLICIES IN COMPUTERS [patent_app_type] => utility [patent_app_number] => 18/581216 [patent_app_country] => US [patent_app_date] => 2024-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581216 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/581216
CUSTOMIZED THERMAL AND POWER POLICIES IN COMPUTERS Feb 18, 2024 Pending
Array ( [id] => 19219620 [patent_doc_number] => 20240184324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => System and Method For Global Synchronization of Time in a Distributed Processing Environment [patent_app_type] => utility [patent_app_number] => 18/439189 [patent_app_country] => US [patent_app_date] => 2024-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439189 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/439189
System and method for global synchronization of time in a distributed processing environment Feb 11, 2024 Issued
Array ( [id] => 19788942 [patent_doc_number] => 20250062621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => POWER MANAGEMENT METHOD OF SYSTEM AND RELATED INTERNET DATA CENTER [patent_app_type] => utility [patent_app_number] => 18/430570 [patent_app_country] => US [patent_app_date] => 2024-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18430570 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/430570
POWER MANAGEMENT METHOD OF SYSTEM AND RELATED INTERNET DATA CENTER Jan 31, 2024 Pending
Array ( [id] => 20344602 [patent_doc_number] => 12468331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Real-time sliding ultrashort-term forecast model algorithm based on frequency data and phase data [patent_app_type] => utility [patent_app_number] => 18/421435 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421435 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/421435
Real-time sliding ultrashort-term forecast model algorithm based on frequency data and phase data Jan 23, 2024 Issued
Array ( [id] => 19174268 [patent_doc_number] => 20240160242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => MULTI-CLOCK SYNCHRONIZATION IN POWER GRIDS [patent_app_type] => utility [patent_app_number] => 18/419710 [patent_app_country] => US [patent_app_date] => 2024-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5014 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419710 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419710
Multi-clock synchronization in power grids Jan 22, 2024 Issued
Array ( [id] => 19481968 [patent_doc_number] => 20240330010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => METHOD AND INFORMATION PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 18/405064 [patent_app_country] => US [patent_app_date] => 2024-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18405064 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/405064
Method and information processing device Jan 4, 2024 Issued
Array ( [id] => 20344604 [patent_doc_number] => 12468333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Distributed in-memory timer queues [patent_app_type] => utility [patent_app_number] => 18/400742 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5588 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400742 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/400742
Distributed in-memory timer queues Dec 28, 2023 Issued
Array ( [id] => 19450738 [patent_doc_number] => 20240310868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => MANAGING CLOCK TRIGGER SIGNALS FOR ASYNCHRONOUS CLOCK DOMAINS [patent_app_type] => utility [patent_app_number] => 18/398496 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7978 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398496 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/398496
MANAGING CLOCK TRIGGER SIGNALS FOR ASYNCHRONOUS CLOCK DOMAINS Dec 27, 2023 Issued
Array ( [id] => 20086955 [patent_doc_number] => 20250216891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => CLOCK LEADER MONITORING FOR TIME-SYNCHRONIZED NETWORKS [patent_app_type] => utility [patent_app_number] => 18/399086 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399086
CLOCK LEADER MONITORING FOR TIME-SYNCHRONIZED NETWORKS Dec 27, 2023 Pending
Array ( [id] => 20086955 [patent_doc_number] => 20250216891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => CLOCK LEADER MONITORING FOR TIME-SYNCHRONIZED NETWORKS [patent_app_type] => utility [patent_app_number] => 18/399086 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399086
CLOCK LEADER MONITORING FOR TIME-SYNCHRONIZED NETWORKS Dec 27, 2023 Pending
Array ( [id] => 20070425 [patent_doc_number] => 20250208647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => CIRCUITRY AND METHOD FOR QUANTIZATION ERROR CORRECTION FOR TIME SYNCHRONIZATION [patent_app_type] => utility [patent_app_number] => 18/395958 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395958 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395958
CIRCUITRY AND METHOD FOR QUANTIZATION ERROR CORRECTION FOR TIME SYNCHRONIZATION Dec 25, 2023 Pending
Menu