Search

Philip A. Stuckey

Examiner (ID: 9809, Phone: (571)272-9875 , Office: P/1723 )

Most Active Art Unit
1723
Art Unit(s)
1723
Total Applications
228
Issued Applications
122
Pending Applications
2
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18113163 [patent_doc_number] => 20230006043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => System And Technique For Creating Implanted Regions Using Multiple Tilt Angles [patent_app_type] => utility [patent_app_number] => 17/940536 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940536 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940536
System and technique for creating implanted regions using multiple tilt angles Sep 7, 2022 Issued
Array ( [id] => 20612636 [patent_doc_number] => 12588252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Fin trim plug structures with metal for imparting channel stress [patent_app_type] => utility [patent_app_number] => 17/940944 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 38 [patent_no_of_words] => 9424 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940944
Fin trim plug structures with metal for imparting channel stress Sep 7, 2022 Issued
Array ( [id] => 19007976 [patent_doc_number] => 20240072047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => STACKED FORK SHEET DEVICES [patent_app_type] => utility [patent_app_number] => 17/900047 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17900047 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/900047
Stacked fork sheet devices Aug 30, 2022 Issued
Array ( [id] => 18992997 [patent_doc_number] => 20240064966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => VERTICALLY STACKED STORAGE NODES AND ACCESS DEVICES WITH HORIZONTAL ACCESS LINES [patent_app_type] => utility [patent_app_number] => 17/891790 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891790 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891790
VERTICALLY STACKED STORAGE NODES AND ACCESS DEVICES WITH HORIZONTAL ACCESS LINES Aug 18, 2022 Issued
Array ( [id] => 19062891 [patent_doc_number] => 11942136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Memory device having shared read/write access line for 2-transistor vertical memory cell [patent_app_type] => utility [patent_app_number] => 17/887903 [patent_app_country] => US [patent_app_date] => 2022-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11092 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887903 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/887903
Memory device having shared read/write access line for 2-transistor vertical memory cell Aug 14, 2022 Issued
Array ( [id] => 18977225 [patent_doc_number] => 20240057317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => RECESSED CHANNEL FIN INTEGRATION [patent_app_type] => utility [patent_app_number] => 17/886917 [patent_app_country] => US [patent_app_date] => 2022-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886917 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/886917
Recessed channel fin integration Aug 11, 2022 Issued
Array ( [id] => 20217762 [patent_doc_number] => 12414431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Organic light-emitting element, light-emitting device, and light-emitting method [patent_app_type] => utility [patent_app_number] => 17/883770 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 78 [patent_no_of_words] => 11842 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17883770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/883770
Organic light-emitting element, light-emitting device, and light-emitting method Aug 8, 2022 Issued
Array ( [id] => 18409070 [patent_doc_number] => 20230170423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => MEMORY DEVICE CAPABLE OF MULTI-LEVEL DRIVING [patent_app_type] => utility [patent_app_number] => 17/882536 [patent_app_country] => US [patent_app_date] => 2022-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4252 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882536 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/882536
MEMORY DEVICE CAPABLE OF MULTI-LEVEL DRIVING Aug 5, 2022 Abandoned
Array ( [id] => 18122402 [patent_doc_number] => 20230008005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => FIN LOSS PREVENTION [patent_app_type] => utility [patent_app_number] => 17/875466 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5058 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875466 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875466
Fin loss prevention Jul 27, 2022 Issued
Array ( [id] => 19016486 [patent_doc_number] => 11923431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Bipolar junction transistors including emitter-base and base-collector superlattices [patent_app_type] => utility [patent_app_number] => 17/873426 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5647 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873426 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873426
Bipolar junction transistors including emitter-base and base-collector superlattices Jul 25, 2022 Issued
Array ( [id] => 17993241 [patent_doc_number] => 20220359278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => BARRIER STRUCTURE FOR SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/871179 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871179 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/871179
Barrier structure for semiconductor device Jul 21, 2022 Issued
Array ( [id] => 19335729 [patent_doc_number] => 20240250159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => INSULATED GATE BIPOLAR TRANSISTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/016919 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18016919 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/016919
Insulated gate bipolar transistor device Jul 20, 2022 Issued
Array ( [id] => 18126267 [patent_doc_number] => 20230011887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => LIGHT-EMITTING DIODE AND LIGHT-EMITTING MODULE [patent_app_type] => utility [patent_app_number] => 17/868995 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868995 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868995
Light-emitting diode and light-emitting module Jul 19, 2022 Issued
Array ( [id] => 18849085 [patent_doc_number] => 20230411489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/868753 [patent_app_country] => US [patent_app_date] => 2022-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868753 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868753
Semiconductor device and method for fabricating the same Jul 18, 2022 Issued
Array ( [id] => 18883137 [patent_doc_number] => 20240006506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH PHOSPHIDE OR ARSENIDE METAL COMPOUND LAYERS [patent_app_type] => utility [patent_app_number] => 17/856979 [patent_app_country] => US [patent_app_date] => 2022-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18152 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856979 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856979
LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH PHOSPHIDE OR ARSENIDE METAL COMPOUND LAYERS Jul 1, 2022 Pending
Array ( [id] => 18884890 [patent_doc_number] => 20240008259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY WITH STACKED SEMICONDUCTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/856868 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14155 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856868
THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY WITH STACKED SEMICONDUCTOR STRUCTURES Jun 30, 2022 Issued
Array ( [id] => 18884884 [patent_doc_number] => 20240008253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => INTEGRATED CIRCUIT STRUCTURES HAVING MEMORY ACCESS TRANSISTOR WITH BACKSIDE CONTACT [patent_app_type] => utility [patent_app_number] => 17/855545 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855545 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855545
INTEGRATED CIRCUIT STRUCTURES HAVING MEMORY ACCESS TRANSISTOR WITH BACKSIDE CONTACT Jun 29, 2022 Issued
Array ( [id] => 17949337 [patent_doc_number] => 20220336356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => Semiconductor Device and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 17/854683 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854683 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854683
Semiconductor device and method of manufacture Jun 29, 2022 Issued
Array ( [id] => 19016512 [patent_doc_number] => 11923457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => FinFET structure with fin top hard mask and method of forming the same [patent_app_type] => utility [patent_app_number] => 17/850251 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 9302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850251 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/850251
FinFET structure with fin top hard mask and method of forming the same Jun 26, 2022 Issued
Array ( [id] => 17917707 [patent_doc_number] => 20220320103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => VERTICAL DIGIT LINES FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/843662 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843662 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843662
Vertical digit lines for semiconductor devices Jun 16, 2022 Issued
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