Phillip J Groutt

Array ( [id] => 3981691 [patent_doc_number] => 05887004 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Isolated scan paths' [patent_app_type] => 1 [patent_app_number] => 8/829521 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2347 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/887/05887004.pdf [firstpage_image] =>[orig_patent_app_number] => 829521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4025751 [patent_doc_number] => 06006349 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'High speed pattern generating method and high speed pattern generator using the method' [patent_app_type] => 1 [patent_app_number] => 8/809632 [patent_app_country] => US [patent_app_date] => 1997-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 9921 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/006/06006349.pdf [firstpage_image] =>[orig_patent_app_number] => 809632 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4257672 [patent_doc_number] => 06081916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'IC with test cells having separate data and test paths' [patent_app_type] => 1 [patent_app_number] => 8/826310 [patent_app_country] => US [patent_app_date] => 1997-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 14270 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081916.pdf [firstpage_image] =>[orig_patent_app_number] => 826310 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4055370 [patent_doc_number] => 05912901 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-15 [patent_title] => 'Method and built-in self-test apparatus for testing an integrated circuit which capture failure information for a selected failure' [patent_app_type] => 1 [patent_app_number] => 8/823446 [patent_app_country] => US [patent_app_date] => 1997-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2282 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/912/05912901.pdf [firstpage_image] =>[orig_patent_app_number] => 823446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4199830 [patent_doc_number] => 06038694 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Encoder for producing a checksum associated with changes to a frame in asynchronous transfer mode systems' [patent_app_type] => 1 [patent_app_number] => 8/823079 [patent_app_country] => US [patent_app_date] => 1997-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6277 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038694.pdf [firstpage_image] =>[orig_patent_app_number] => 823079 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4177850 [patent_doc_number] => 06105152 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Devices and methods for testing cell margin of memory devices' [patent_app_type] => 1 [patent_app_number] => 8/822074 [patent_app_country] => US [patent_app_date] => 1997-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5811 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/105/06105152.pdf [firstpage_image] =>[orig_patent_app_number] => 822074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4125645 [patent_doc_number] => 06059451 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Method for improving fault coverage of an electric circuit' [patent_app_type] => 1 [patent_app_number] => 8/821141 [patent_app_country] => US [patent_app_date] => 1997-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 20 [patent_no_of_words] => 13115 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 407 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/059/06059451.pdf [firstpage_image] =>[orig_patent_app_number] => 821141 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4028283 [patent_doc_number] => 05881075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Viterbi decoder' [patent_app_type] => 1 [patent_app_number] => 8/814828 [patent_app_country] => US [patent_app_date] => 1997-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3015 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881075.pdf [firstpage_image] =>[orig_patent_app_number] => 814828 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3924277 [patent_doc_number] => 05938779 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Asic control and data retrieval method and apparatus having an internal collateral test interface function' [patent_app_type] => 1 [patent_app_number] => 8/805661 [patent_app_country] => US [patent_app_date] => 1997-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5267 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/938/05938779.pdf [firstpage_image] =>[orig_patent_app_number] => 805661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4011787 [patent_doc_number] => 05923675 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Semiconductor tester for testing devices with embedded memory' [patent_app_type] => 1 [patent_app_number] => 8/803111 [patent_app_country] => US [patent_app_date] => 1997-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3898 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923675.pdf [firstpage_image] =>[orig_patent_app_number] => 803111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4011773 [patent_doc_number] => 05923674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Semiconductor electrically erasable and writeable non-volatile memory device' [patent_app_type] => 1 [patent_app_number] => 8/803136 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2586 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923674.pdf [firstpage_image] =>[orig_patent_app_number] => 803136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3844803 [patent_doc_number] => 05740180 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Circuit and test method for testing input cells' [patent_app_type] => 1 [patent_app_number] => 8/801451 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4844 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740180.pdf [firstpage_image] =>[orig_patent_app_number] => 801451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3971419 [patent_doc_number] => 05991914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Clock recovery using maximum likelihood sequence estimation' [patent_app_type] => 1 [patent_app_number] => 8/801570 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3962 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/991/05991914.pdf [firstpage_image] =>[orig_patent_app_number] => 801570 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3754617 [patent_doc_number] => 05754560 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Method and apparatus for establishing a test loop for monitoring the operation of a radio station' [patent_app_type] => 1 [patent_app_number] => 8/776941 [patent_app_country] => US [patent_app_date] => 1997-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1864 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754560.pdf [firstpage_image] =>[orig_patent_app_number] => 776941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3940747 [patent_doc_number] => 05878051 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Assembly-level bist using field-programmable gate array' [patent_app_type] => 1 [patent_app_number] => 8/795211 [patent_app_country] => US [patent_app_date] => 1997-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5609 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/878/05878051.pdf [firstpage_image] =>[orig_patent_app_number] => 795211 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3822440 [patent_doc_number] => 05831988 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Fault isolating to a block of ROM' [patent_app_type] => 1 [patent_app_number] => 8/788111 [patent_app_country] => US [patent_app_date] => 1997-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3822 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/831/05831988.pdf [firstpage_image] =>[orig_patent_app_number] => 788111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4058391 [patent_doc_number] => 05996112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Area-efficient surviving paths unit for Viterbi decoders' [patent_app_type] => 1 [patent_app_number] => 8/785391 [patent_app_country] => US [patent_app_date] => 1997-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6408 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/996/05996112.pdf [firstpage_image] =>[orig_patent_app_number] => 785391 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4200656 [patent_doc_number] => 06021516 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Communication system and transmission station' [patent_app_type] => 1 [patent_app_number] => 8/786479 [patent_app_country] => US [patent_app_date] => 1997-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 6319 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021516.pdf [firstpage_image] =>[orig_patent_app_number] => 786479 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3933586 [patent_doc_number] => 05914967 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Method and apparatus for protecting disk drive failure' [patent_app_type] => 1 [patent_app_number] => 8/785754 [patent_app_country] => US [patent_app_date] => 1997-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5618 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914967.pdf [firstpage_image] =>[orig_patent_app_number] => 785754 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3803719 [patent_doc_number] => 05841786 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Testing of memory content' [patent_app_type] => 1 [patent_app_number] => 8/765368 [patent_app_country] => US [patent_app_date] => 1997-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1269 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841786.pdf [firstpage_image] =>[orig_patent_app_number] => 765368 [rel_patent_id] =>[rel_patent_doc_number] =>)