Search

Pho M. Luu

Examiner (ID: 13870, Phone: (571)272-1876 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2811, 2824
Total Applications
2531
Issued Applications
2381
Pending Applications
112
Abandoned Applications
66

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19205848 [patent_doc_number] => 20240177747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => MEMORY CONTROLLER WITH STAGGERED REQUEST SIGNAL OUTPUT [patent_app_type] => utility [patent_app_number] => 18/388680 [patent_app_country] => US [patent_app_date] => 2023-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6841 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18388680 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/388680
Memory controller with staggered request signal output Nov 9, 2023 Issued
Array ( [id] => 19174377 [patent_doc_number] => 20240160351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION [patent_app_type] => utility [patent_app_number] => 18/504362 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504362 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/504362
Apparatuses and methods for separate write enable for single-pass access of data, metadata, and parity information Nov 7, 2023 Issued
Array ( [id] => 20481813 [patent_doc_number] => 12530288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Read disturb tracking among multiple erase blocks coupled to a same string [patent_app_type] => utility [patent_app_number] => 18/386783 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5929 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18386783 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/386783
Read disturb tracking among multiple erase blocks coupled to a same string Nov 2, 2023 Issued
Array ( [id] => 20481812 [patent_doc_number] => 12530287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Read disturb tracking among multiple erase blocks coupled to a same string [patent_app_type] => utility [patent_app_number] => 18/386760 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18386760 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/386760
Read disturb tracking among multiple erase blocks coupled to a same string Nov 2, 2023 Issued
Array ( [id] => 18977392 [patent_doc_number] => 20240057484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => MEMORY CELLS BASED ON SUPERCONDUCTING AND MAGNETIC MATERIALS AND METHODS OF THEIR CONTROL IN ARRAYS [patent_app_type] => utility [patent_app_number] => 18/492511 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10559 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18492511 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/492511
Memory cells based on superconducting and magnetic materials and methods of their control in arrays Oct 22, 2023 Issued
Array ( [id] => 20758853 [patent_doc_number] => 12651630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Tracking scheme circuit of memory device and methods for operating the same [patent_app_type] => utility [patent_app_number] => 18/480762 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2004 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480762 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/480762
Tracking scheme circuit of memory device and methods for operating the same Oct 3, 2023 Issued
Array ( [id] => 20611028 [patent_doc_number] => 12586632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Signal receiver, data receiver and data latch thereof [patent_app_type] => utility [patent_app_number] => 18/481224 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481224 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/481224
Signal receiver, data receiver and data latch thereof Oct 3, 2023 Issued
Array ( [id] => 18905748 [patent_doc_number] => 20240021233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => METHOD AND SYSTEM FOR REFRESH OF MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/473086 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/473086
Method and system for refresh of memory devices Sep 21, 2023 Issued
Array ( [id] => 19483732 [patent_doc_number] => 20240331774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => NONVOLATILE MEMORY DEVICE, STORAGE DEVICE INCLUDING THE SAME, AND METHOD OF TESTING NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/367677 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18367677 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/367677
Nonvolatile memory device, storage device including the same, and method of testing nonvolatile memory device Sep 12, 2023 Issued
Array ( [id] => 19057186 [patent_doc_number] => 20240099155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => MAGNETIC MEMORY [patent_app_type] => utility [patent_app_number] => 18/464350 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18464350 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/464350
Magnetic memory Sep 10, 2023 Issued
Array ( [id] => 19834096 [patent_doc_number] => 20250085882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => BLOCK DATA ENCRYPTION OF NON-VOLATILE MEMORY THROUGH SELECTIVE SELECT GATE ERASE THROUGH CHARGE COUPLED SCHEME [patent_app_type] => utility [patent_app_number] => 18/463525 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463525 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/463525
Block data encryption of non-volatile memory through selective select gate erase through charge coupled scheme Sep 7, 2023 Issued
Array ( [id] => 18849761 [patent_doc_number] => 20230412165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => TEMPERATURE SENSOR CIRCUITS FOR INTEGRATED CIRCUIT DEVICES [patent_app_type] => utility [patent_app_number] => 18/238706 [patent_app_country] => US [patent_app_date] => 2023-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11483 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18238706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/238706
Temperature sensor circuits for integrated circuit devices Aug 27, 2023 Issued
Array ( [id] => 18833573 [patent_doc_number] => 20230402100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => MEMORY SYSTEM HAVING A NON-VOLATILE MEMORY AND A CONTROLLER CONFIGURED TO SWITCH A MODE FOR CONTROLLING AN ACCESS OPERATION TO THE NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/455575 [patent_app_country] => US [patent_app_date] => 2023-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18455575 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/455575
Memory system having a non-volatile memory and a controller configured to switch a mode for controlling an access operation to the non-volatile memory Aug 23, 2023 Issued
Array ( [id] => 19444259 [patent_doc_number] => 12094545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Techniques for preventing read disturb in NAND memory [patent_app_type] => utility [patent_app_number] => 18/235727 [patent_app_country] => US [patent_app_date] => 2023-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18235727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/235727
Techniques for preventing read disturb in NAND memory Aug 17, 2023 Issued
Array ( [id] => 19698481 [patent_doc_number] => 20250017026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => 3D MEMORY CELL WITH DUAL-SIDE CONTACTS AND METHOD OF FABRICATION [patent_app_type] => utility [patent_app_number] => 18/234325 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234325 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234325
3D MEMORY CELL WITH DUAL-SIDE CONTACTS AND METHOD OF FABRICATION Aug 14, 2023 Pending
Array ( [id] => 20690283 [patent_doc_number] => 12620440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Storage device and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/448164 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 4726 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448164 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448164
Storage device and method of operating the same Aug 10, 2023 Issued
Array ( [id] => 19660597 [patent_doc_number] => 20240427662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => SINGLE BLOCK MODE BLOCK HANDLING FOR SINGLE-SIDE GIDL ERASE [patent_app_type] => utility [patent_app_number] => 18/232538 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232538 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/232538
Single block mode block handling for single-side GIDL erase Aug 9, 2023 Issued
Array ( [id] => 18989623 [patent_doc_number] => 20240061592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => MULTIPLE CURRENT QUANTIZATION VALUES FOR PEAK POWER MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/231338 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231338 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231338
Multiple current quantization values for peak power management Aug 7, 2023 Issued
Array ( [id] => 19686115 [patent_doc_number] => 20250004660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => SOLID-STATE DRIVE SECURE DATA WIPING FOR REUSE AND RECYCLING [patent_app_type] => utility [patent_app_number] => 18/230145 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18230145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/230145
Solid-state drive secure data wiping for reuse and recycling Aug 2, 2023 Issued
Array ( [id] => 20161151 [patent_doc_number] => 12387784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Memory circuit [patent_app_type] => utility [patent_app_number] => 18/229182 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 0 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18229182 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/229182
Memory circuit Aug 1, 2023 Issued
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