
Phong Son H. Dang
Examiner (ID: 488, Phone: (571)270-5809 , Office: P/3731 )
| Most Active Art Unit | 3771 |
| Art Unit(s) | 3771, 3773, 3731 |
| Total Applications | 1074 |
| Issued Applications | 866 |
| Pending Applications | 62 |
| Abandoned Applications | 178 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14920763
[patent_doc_number] => 10431709
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-10-01
[patent_title] => Fabricating thin-film optoelectronic devices with modified surface
[patent_app_type] => utility
[patent_app_number] => 16/144636
[patent_app_country] => US
[patent_app_date] => 2018-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 23
[patent_no_of_words] => 13574
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16144636
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/144636 | Fabricating thin-film optoelectronic devices with modified surface | Sep 26, 2018 | Issued |
Array
(
[id] => 14509865
[patent_doc_number] => 20190198587
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-27
[patent_title] => DISPLAY DEVICE AND FABRICATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/139366
[patent_app_country] => US
[patent_app_date] => 2018-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7530
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139366
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/139366 | Display device and fabrication method thereof | Sep 23, 2018 | Issued |
Array
(
[id] => 15427933
[patent_doc_number] => 10546906
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-28
[patent_title] => Thin film transistor array substrate and organic light-emitting display device including the same
[patent_app_type] => utility
[patent_app_number] => 16/138884
[patent_app_country] => US
[patent_app_date] => 2018-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 10427
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16138884
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/138884 | Thin film transistor array substrate and organic light-emitting display device including the same | Sep 20, 2018 | Issued |
Array
(
[id] => 15918485
[patent_doc_number] => 10656479
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-19
[patent_title] => Display device
[patent_app_type] => utility
[patent_app_number] => 16/129914
[patent_app_country] => US
[patent_app_date] => 2018-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 6386
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129914
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/129914 | Display device | Sep 12, 2018 | Issued |
Array
(
[id] => 13629835
[patent_doc_number] => 20180366470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-12-20
[patent_title] => SELECTIVE SAC CAPPING ON FIN FIELD EFFECT TRANSISTOR STRUCTURES AND RELATED METHODS
[patent_app_type] => utility
[patent_app_number] => 16/114596
[patent_app_country] => US
[patent_app_date] => 2018-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4183
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114596
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/114596 | Selective SAC capping on fin field effect transistor structures and related methods | Aug 27, 2018 | Issued |
Array
(
[id] => 13629635
[patent_doc_number] => 20180366370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-12-20
[patent_title] => SELF-ALIGNED INTERCONNECTION FOR INTEGRATED CIRCUITS
[patent_app_type] => utility
[patent_app_number] => 16/111004
[patent_app_country] => US
[patent_app_date] => 2018-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8978
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111004
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/111004 | Self-aligned interconnection for integrated circuits | Aug 22, 2018 | Issued |
Array
(
[id] => 15139753
[patent_doc_number] => 10483364
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-19
[patent_title] => Semiconductor structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/050747
[patent_app_country] => US
[patent_app_date] => 2018-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4656
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16050747
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/050747 | Semiconductor structure and manufacturing method thereof | Jul 30, 2018 | Issued |
Array
(
[id] => 15139257
[patent_doc_number] => 10483112
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-19
[patent_title] => Metal gate stack having TaAlCN layer
[patent_app_type] => utility
[patent_app_number] => 16/042527
[patent_app_country] => US
[patent_app_date] => 2018-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7419
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16042527
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/042527 | Metal gate stack having TaAlCN layer | Jul 22, 2018 | Issued |
Array
(
[id] => 16609476
[patent_doc_number] => 10910492
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-02
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/036489
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 27
[patent_no_of_words] => 8445
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 258
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036489
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/036489 | Semiconductor device and method for manufacturing the same | Jul 15, 2018 | Issued |
Array
(
[id] => 13848017
[patent_doc_number] => 20190027493
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-24
[patent_title] => SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, MEMORY DEVICE, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/036282
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 36561
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -32
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036282
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/036282 | Semiconductor device, semiconductor wafer, memory device, and electronic device | Jul 15, 2018 | Issued |
Array
(
[id] => 15985061
[patent_doc_number] => 10672870
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-02
[patent_title] => Semiconductor device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/036302
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 21
[patent_no_of_words] => 8178
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036302
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/036302 | Semiconductor device and manufacturing method thereof | Jul 15, 2018 | Issued |
Array
(
[id] => 16339418
[patent_doc_number] => 10790388
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-29
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/036434
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 21
[patent_no_of_words] => 10268
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036434
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/036434 | Semiconductor device and method for manufacturing the same | Jul 15, 2018 | Issued |
Array
(
[id] => 15370041
[patent_doc_number] => 20200020785
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-16
[patent_title] => Reducing Pattern Loading in the Etch-Back of Metal Gate
[patent_app_type] => utility
[patent_app_number] => 16/035844
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7733
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16035844
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/035844 | Reducing pattern loading in the etch-back of metal gate | Jul 15, 2018 | Issued |
Array
(
[id] => 16356640
[patent_doc_number] => 10797158
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-06
[patent_title] => Transistor comprising a lengthened gate
[patent_app_type] => utility
[patent_app_number] => 16/036453
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 2632
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036453
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/036453 | Transistor comprising a lengthened gate | Jul 15, 2018 | Issued |
Array
(
[id] => 15857437
[patent_doc_number] => 10644017
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-05
[patent_title] => Semiconductor device and manufacturing method therefor
[patent_app_type] => utility
[patent_app_number] => 16/036324
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 40
[patent_no_of_words] => 13652
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 299
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036324
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/036324 | Semiconductor device and manufacturing method therefor | Jul 15, 2018 | Issued |
Array
(
[id] => 15369713
[patent_doc_number] => 20200020621
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-16
[patent_title] => Selective Plating of Semiconductor Package Leads
[patent_app_type] => utility
[patent_app_number] => 16/036354
[patent_app_country] => US
[patent_app_date] => 2018-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4962
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036354
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/036354 | Selective Plating of Semiconductor Package Leads | Jul 15, 2018 | Abandoned |
Array
(
[id] => 16256749
[patent_doc_number] => 20200266124
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-20
[patent_title] => RADIATOR COMPONENT AND HEAT DISSIPATION SYSTEM FOR POWER SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/647923
[patent_app_country] => US
[patent_app_date] => 2018-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4562
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16647923
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/647923 | Radiator component and heat dissipation system for power semiconductor device | Jul 5, 2018 | Issued |
Array
(
[id] => 16293501
[patent_doc_number] => 10770356
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-08
[patent_title] => Contact structure and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 16/016962
[patent_app_country] => US
[patent_app_date] => 2018-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6855
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016962
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/016962 | Contact structure and method of fabricating the same | Jun 24, 2018 | Issued |
Array
(
[id] => 14859223
[patent_doc_number] => 10418346
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-09-17
[patent_title] => Package including a plurality of stacked semiconductor devices having area efficient ESD protection
[patent_app_type] => utility
[patent_app_number] => 16/002183
[patent_app_country] => US
[patent_app_date] => 2018-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 5627
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16002183
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/002183 | Package including a plurality of stacked semiconductor devices having area efficient ESD protection | Jun 6, 2018 | Issued |
Array
(
[id] => 13435247
[patent_doc_number] => 20180269166
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-20
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/981956
[patent_app_country] => US
[patent_app_date] => 2018-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11287
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981956
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981956 | Semiconductor device | May 16, 2018 | Issued |