
Phong Son H. Dang
Examiner (ID: 488, Phone: (571)270-5809 , Office: P/3731 )
| Most Active Art Unit | 3771 |
| Art Unit(s) | 3771, 3773, 3731 |
| Total Applications | 1074 |
| Issued Applications | 866 |
| Pending Applications | 62 |
| Abandoned Applications | 178 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20260570
[patent_doc_number] => 12432941
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-30
[patent_title] => Capacitor and method for forming the same
[patent_app_type] => utility
[patent_app_number] => 17/830239
[patent_app_country] => US
[patent_app_date] => 2022-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 65
[patent_figures_cnt] => 95
[patent_no_of_words] => 14074
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830239
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/830239 | Capacitor and method for forming the same | May 31, 2022 | Issued |
Array
(
[id] => 18821306
[patent_doc_number] => 20230395647
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-07
[patent_title] => SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATION THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/829717
[patent_app_country] => US
[patent_app_date] => 2022-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7303
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829717
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/829717 | Semiconductor devices and methods for fabrication thereof | May 31, 2022 | Issued |
Array
(
[id] => 18812853
[patent_doc_number] => 20230387190
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => MULTILAYER STRUCTURE, CAPACITOR STRUCTURE AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/827837
[patent_app_country] => US
[patent_app_date] => 2022-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6438
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17827837
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/827837 | Multilayer structure, capacitor structure and electronic device | May 29, 2022 | Issued |
Array
(
[id] => 17870984
[patent_doc_number] => 20220293721
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-15
[patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/827777
[patent_app_country] => US
[patent_app_date] => 2022-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6592
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17827777
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/827777 | Manufacturing method of semiconductor device and semiconductor device | May 28, 2022 | Issued |
Array
(
[id] => 17990022
[patent_doc_number] => 20220356059
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => STACKED-DIE MEMS RESONATOR
[patent_app_type] => utility
[patent_app_number] => 17/827437
[patent_app_country] => US
[patent_app_date] => 2022-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5875
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17827437
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/827437 | Stacked-die MEMS resonator | May 26, 2022 | Issued |
Array
(
[id] => 18812851
[patent_doc_number] => 20230387188
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => STORAGE CAPACITOR WITH MULTIPLE DIELECTRICS
[patent_app_type] => utility
[patent_app_number] => 17/751936
[patent_app_country] => US
[patent_app_date] => 2022-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6281
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17751936
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/751936 | Storage capacitor with multiple dielectrics | May 23, 2022 | Issued |
Array
(
[id] => 19261048
[patent_doc_number] => 12021115
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-25
[patent_title] => Metal-insulator-metal (MIM) capacitor module with dielectric sidewall spacer
[patent_app_type] => utility
[patent_app_number] => 17/749367
[patent_app_country] => US
[patent_app_date] => 2022-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 6295
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749367
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/749367 | Metal-insulator-metal (MIM) capacitor module with dielectric sidewall spacer | May 19, 2022 | Issued |
Array
(
[id] => 19341521
[patent_doc_number] => 12051719
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-30
[patent_title] => Method for manufacturing semiconductor structure with single side capacitor
[patent_app_type] => utility
[patent_app_number] => 17/748869
[patent_app_country] => US
[patent_app_date] => 2022-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 9748
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17748869
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/748869 | Method for manufacturing semiconductor structure with single side capacitor | May 18, 2022 | Issued |
Array
(
[id] => 18789557
[patent_doc_number] => 20230378248
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-23
[patent_title] => SEMICONDUCTOR STRUCTURE WITH SINGLE SIDE CAPACITOR
[patent_app_type] => utility
[patent_app_number] => 17/748201
[patent_app_country] => US
[patent_app_date] => 2022-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9735
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17748201
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/748201 | Semiconductor structure with single side capacitor | May 18, 2022 | Issued |
Array
(
[id] => 18473327
[patent_doc_number] => 20230207615
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => METAL-INSULATOR-METAL (MIM) CAPACITOR MODULE INCLUDING A CUP-SHAPED STRUCTURE WITH A ROUNDED CORNER REGION
[patent_app_type] => utility
[patent_app_number] => 17/747302
[patent_app_country] => US
[patent_app_date] => 2022-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7620
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747302
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/747302 | Metal-insulator-metal (MIM) capacitor module including a cup-shaped structure with a rounded corner region | May 17, 2022 | Issued |
Array
(
[id] => 20134173
[patent_doc_number] => 12376505
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-29
[patent_title] => Resistive memory device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/747000
[patent_app_country] => US
[patent_app_date] => 2022-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 0
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747000
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/747000 | Resistive memory device and method for manufacturing the same | May 17, 2022 | Issued |
Array
(
[id] => 20134173
[patent_doc_number] => 12376505
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-29
[patent_title] => Resistive memory device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/747000
[patent_app_country] => US
[patent_app_date] => 2022-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 0
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747000
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/747000 | Resistive memory device and method for manufacturing the same | May 17, 2022 | Issued |
Array
(
[id] => 19733891
[patent_doc_number] => 12211893
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-28
[patent_title] => Semiconductor structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/662472
[patent_app_country] => US
[patent_app_date] => 2022-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 24
[patent_no_of_words] => 8462
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17662472
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/662472 | Semiconductor structure and manufacturing method thereof | May 8, 2022 | Issued |
Array
(
[id] => 17811065
[patent_doc_number] => 20220262900
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-18
[patent_title] => TRANSISTOR WITH EMBEDDED ISOLATION LAYER IN BULK SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 17/738179
[patent_app_country] => US
[patent_app_date] => 2022-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3126
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17738179
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/738179 | Transistor with embedded isolation layer in bulk substrate | May 5, 2022 | Issued |
Array
(
[id] => 18306414
[patent_doc_number] => 20230110314
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-13
[patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/737393
[patent_app_country] => US
[patent_app_date] => 2022-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4881
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737393
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/737393 | Method for fabricating semiconductor device | May 4, 2022 | Issued |
Array
(
[id] => 18527467
[patent_doc_number] => 11714458
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-01
[patent_title] => Display panel
[patent_app_type] => utility
[patent_app_number] => 17/736900
[patent_app_country] => US
[patent_app_date] => 2022-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4563
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17736900
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/736900 | Display panel | May 3, 2022 | Issued |
Array
(
[id] => 18433248
[patent_doc_number] => 11678490
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-13
[patent_title] => Semiconductor device, semiconductor wafer, memory device, and electronic device
[patent_app_type] => utility
[patent_app_number] => 17/735168
[patent_app_country] => US
[patent_app_date] => 2022-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 64
[patent_figures_cnt] => 130
[patent_no_of_words] => 36556
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17735168
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/735168 | Semiconductor device, semiconductor wafer, memory device, and electronic device | May 2, 2022 | Issued |
Array
(
[id] => 18743596
[patent_doc_number] => 20230352584
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => TECHNOLOGIES FOR TRANSISTORS WITH A FERROELECTRIC GATE DIELECTRIC
[patent_app_type] => utility
[patent_app_number] => 17/734372
[patent_app_country] => US
[patent_app_date] => 2022-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12710
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734372
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/734372 | TECHNOLOGIES FOR TRANSISTORS WITH A FERROELECTRIC GATE DIELECTRIC | May 1, 2022 | Pending |
Array
(
[id] => 18743596
[patent_doc_number] => 20230352584
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => TECHNOLOGIES FOR TRANSISTORS WITH A FERROELECTRIC GATE DIELECTRIC
[patent_app_type] => utility
[patent_app_number] => 17/734372
[patent_app_country] => US
[patent_app_date] => 2022-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12710
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734372
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/734372 | TECHNOLOGIES FOR TRANSISTORS WITH A FERROELECTRIC GATE DIELECTRIC | May 1, 2022 | Pending |
Array
(
[id] => 18631935
[patent_doc_number] => 20230290840
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-14
[patent_title] => BACK SIDE POWER SUPPLY INTERCONNECT ROUTING
[patent_app_type] => utility
[patent_app_number] => 17/661386
[patent_app_country] => US
[patent_app_date] => 2022-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9554
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661386
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/661386 | BACK SIDE POWER SUPPLY INTERCONNECT ROUTING | Apr 28, 2022 | Pending |