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Phuong A Le

Examiner (ID: 7811)

Most Active Art Unit
2882
Art Unit(s)
2882
Total Applications
1
Issued Applications
1
Pending Applications
0
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2459421 [patent_doc_number] => 04733346 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-03-22 [patent_title] => 'Data processor with multiple register blocks' [patent_app_type] => 1 [patent_app_number] => 6/763716 [patent_app_country] => US [patent_app_date] => 1985-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8630 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/733/04733346.pdf [firstpage_image] =>[orig_patent_app_number] => 763716 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/763716
Data processor with multiple register blocks Aug 7, 1985 Issued
06/761221 HIGH PERFORMANCE COMPUTER PIPELINE Jul 30, 1985 Abandoned
Array ( [id] => 2538242 [patent_doc_number] => 04839797 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-06-13 [patent_title] => 'Microprocessor compatible with any software represented by different types of instruction formats' [patent_app_type] => 1 [patent_app_number] => 6/759006 [patent_app_country] => US [patent_app_date] => 1985-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5646 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/839/04839797.pdf [firstpage_image] =>[orig_patent_app_number] => 759006 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/759006
Microprocessor compatible with any software represented by different types of instruction formats Jul 24, 1985 Issued
Array ( [id] => 2389577 [patent_doc_number] => 04783736 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-08 [patent_title] => 'Digital computer with multisection cache' [patent_app_type] => 1 [patent_app_number] => 6/757853 [patent_app_country] => US [patent_app_date] => 1985-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 26964 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/783/04783736.pdf [firstpage_image] =>[orig_patent_app_number] => 757853 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/757853
Digital computer with multisection cache Jul 21, 1985 Issued
06/755358 TEXT EDITING APPARATUS WITH CHARACTER STRING RETRIEVAL Jul 15, 1985 Abandoned
06/752226 MICROPROCESSOR INTERFACE DEVICE Jul 2, 1985 Abandoned
Array ( [id] => 2639869 [patent_doc_number] => 04977496 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-11 [patent_title] => 'Branching control system' [patent_app_type] => 1 [patent_app_number] => 6/752190 [patent_app_country] => US [patent_app_date] => 1985-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4233 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/977/04977496.pdf [firstpage_image] =>[orig_patent_app_number] => 752190 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/752190
Branching control system Jun 24, 1985 Issued
Array ( [id] => 2392481 [patent_doc_number] => 04709328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-11-24 [patent_title] => 'Composite data-processing system using multiple standalone processing systems' [patent_app_type] => 1 [patent_app_number] => 6/745546 [patent_app_country] => US [patent_app_date] => 1985-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4344 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 345 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/709/04709328.pdf [firstpage_image] =>[orig_patent_app_number] => 745546 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/745546
Composite data-processing system using multiple standalone processing systems Jun 16, 1985 Issued
06/743549 MICROPROCESSOR HAVING A DYNAMIC MEMORY REFRESH CIRCUIT Jun 10, 1985 Abandoned
Array ( [id] => 2422081 [patent_doc_number] => 04742480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-03 [patent_title] => 'Cycle counter/shifter for division' [patent_app_type] => 1 [patent_app_number] => 6/741914 [patent_app_country] => US [patent_app_date] => 1985-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1589 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/742/04742480.pdf [firstpage_image] =>[orig_patent_app_number] => 741914 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/741914
Cycle counter/shifter for division Jun 5, 1985 Issued
Array ( [id] => 2571667 [patent_doc_number] => 04835685 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-30 [patent_title] => 'Virtual single machine with message-like hardware interrupts and processor exceptions' [patent_app_type] => 1 [patent_app_number] => 6/730922 [patent_app_country] => US [patent_app_date] => 1985-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 8907 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/835/04835685.pdf [firstpage_image] =>[orig_patent_app_number] => 730922 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/730922
Virtual single machine with message-like hardware interrupts and processor exceptions May 5, 1985 Issued
06/729309 WORD PROCESSOR CAPABLE OF AUTOMATIC TITLING OF DOCUMENTS Apr 30, 1985 Abandoned
Array ( [id] => 2718645 [patent_doc_number] => 05018059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Method and apparatus for telecommunications signal processing and switching' [patent_app_type] => 1 [patent_app_number] => 6/729441 [patent_app_country] => US [patent_app_date] => 1985-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4507 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 429 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/018/05018059.pdf [firstpage_image] =>[orig_patent_app_number] => 729441 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/729441
Method and apparatus for telecommunications signal processing and switching Apr 30, 1985 Issued
06/714862 DATA PROCESSING DEVICE WITH HIGH SECURITY OF STORED PROGRAMS Mar 21, 1985 Abandoned
06/704081 DATA PROCESSING APPARATUS FOR OVERLAPPING IMAGE STORAGE Feb 20, 1985 Abandoned
Array ( [id] => 2460199 [patent_doc_number] => 04760514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-07-26 [patent_title] => 'Data transmission system with flexible error recovery' [patent_app_type] => 1 [patent_app_number] => 6/699553 [patent_app_country] => US [patent_app_date] => 1985-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3622 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/760/04760514.pdf [firstpage_image] =>[orig_patent_app_number] => 699553 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/699553
Data transmission system with flexible error recovery Feb 7, 1985 Issued
06/698876 DATA PROCESSING TERMINAL DEVICE AND METHOD FOR OPERATING SAME Feb 5, 1985 Abandoned
Array ( [id] => 2529232 [patent_doc_number] => 04885681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-05 [patent_title] => 'I/O Execution method for a virtual machine system and system therefor' [patent_app_type] => 1 [patent_app_number] => 6/691909 [patent_app_country] => US [patent_app_date] => 1985-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 25 [patent_no_of_words] => 10125 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/885/04885681.pdf [firstpage_image] =>[orig_patent_app_number] => 691909 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/691909
I/O Execution method for a virtual machine system and system therefor Jan 15, 1985 Issued
06/673694 FORTH SPECIFIC LANGUAGE MICROPROCESSOR Nov 20, 1984 Abandoned
Array ( [id] => 2551413 [patent_doc_number] => 04827401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-02 [patent_title] => 'Method and apparatus for synchronizing clocks prior to the execution of a flush operation' [patent_app_type] => 1 [patent_app_number] => 6/664284 [patent_app_country] => US [patent_app_date] => 1984-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 8267 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/827/04827401.pdf [firstpage_image] =>[orig_patent_app_number] => 664284 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/664284
Method and apparatus for synchronizing clocks prior to the execution of a flush operation Oct 23, 1984 Issued
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