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Phuong A Le

Examiner (ID: 7811)

Most Active Art Unit
2882
Art Unit(s)
2882
Total Applications
1
Issued Applications
1
Pending Applications
0
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3537207 [patent_doc_number] => 05504875 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-02 [patent_title] => 'Nonvolatile memory with a programmable output of selectable width and a method for controlling the nonvolatile memory to switch between different output widths' [patent_app_type] => 1 [patent_app_number] => 8/032686 [patent_app_country] => US [patent_app_date] => 1993-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8924 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/504/05504875.pdf [firstpage_image] =>[orig_patent_app_number] => 032686 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/032686
Nonvolatile memory with a programmable output of selectable width and a method for controlling the nonvolatile memory to switch between different output widths Mar 16, 1993 Issued
Array ( [id] => 3474268 [patent_doc_number] => 05469557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Code protection in microcontroller with EEPROM fuses' [patent_app_type] => 1 [patent_app_number] => 8/026967 [patent_app_country] => US [patent_app_date] => 1993-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2247 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/469/05469557.pdf [firstpage_image] =>[orig_patent_app_number] => 026967 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/026967
Code protection in microcontroller with EEPROM fuses Mar 4, 1993 Issued
Array ( [id] => 3595640 [patent_doc_number] => 05581723 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Method and apparatus for retaining flash block structure data during erase operations in a flash EEPROM memory array' [patent_app_type] => 1 [patent_app_number] => 8/020204 [patent_app_country] => US [patent_app_date] => 1993-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7572 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581723.pdf [firstpage_image] =>[orig_patent_app_number] => 020204 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/020204
Method and apparatus for retaining flash block structure data during erase operations in a flash EEPROM memory array Feb 18, 1993 Issued
07/993003 EFFECTIVE USE OF MEMORY BUS IN A MULTIPROCESSING ENVIRONMENT BY CONTROLLING END OF DATA INTERVENTION BY A SNOOPING CACHE Dec 17, 1992 Abandoned
Array ( [id] => 3025230 [patent_doc_number] => 05276892 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Destination control logic for arithmetic and logic unit for digital data processor' [patent_app_type] => 1 [patent_app_number] => 7/945856 [patent_app_country] => US [patent_app_date] => 1992-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 21230 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276892.pdf [firstpage_image] =>[orig_patent_app_number] => 945856 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/945856
Destination control logic for arithmetic and logic unit for digital data processor Sep 15, 1992 Issued
Array ( [id] => 2951270 [patent_doc_number] => 05261064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Burst access memory' [patent_app_type] => 1 [patent_app_number] => 7/940744 [patent_app_country] => US [patent_app_date] => 1992-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 3976 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/261/05261064.pdf [firstpage_image] =>[orig_patent_app_number] => 940744 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/940744
Burst access memory Sep 7, 1992 Issued
07/940736 FILING SYSTEM WITH MULTIPLE FORMS OF STORAGE Sep 7, 1992 Abandoned
Array ( [id] => 3128720 [patent_doc_number] => 05410667 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-25 [patent_title] => 'Data record copy system for a disk drive array data storage subsystem' [patent_app_type] => 1 [patent_app_number] => 7/870573 [patent_app_country] => US [patent_app_date] => 1992-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 10668 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/410/05410667.pdf [firstpage_image] =>[orig_patent_app_number] => 870573 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/870573
Data record copy system for a disk drive array data storage subsystem Apr 16, 1992 Issued
07/863153 ENHANCED VMEBUS PROTOCOL UTILIZING PSEUDOSYNCHRONOUS HANDSHAKING AND BLOCK MODE DATA TRANSFER Apr 1, 1992 Abandoned
07/859284 PROCESS CONTROLLER SINGLE MEMORY CHIP SHADOWING TECHNIQUE Mar 25, 1992 Abandoned
Array ( [id] => 2959821 [patent_doc_number] => 05262948 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-16 [patent_title] => 'Word processor' [patent_app_type] => 1 [patent_app_number] => 7/853864 [patent_app_country] => US [patent_app_date] => 1992-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3840 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/262/05262948.pdf [firstpage_image] =>[orig_patent_app_number] => 853864 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/853864
Word processor Mar 19, 1992 Issued
Array ( [id] => 3473318 [patent_doc_number] => 05392409 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-21 [patent_title] => 'I/O execution method for a virtual machine system and system therefor' [patent_app_type] => 1 [patent_app_number] => 7/851629 [patent_app_country] => US [patent_app_date] => 1992-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 37 [patent_no_of_words] => 14347 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/392/05392409.pdf [firstpage_image] =>[orig_patent_app_number] => 851629 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/851629
I/O execution method for a virtual machine system and system therefor Mar 15, 1992 Issued
Array ( [id] => 3486710 [patent_doc_number] => 05428761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-27 [patent_title] => 'System for achieving atomic non-sequential multi-word operations in shared memory' [patent_app_type] => 1 [patent_app_number] => 7/849887 [patent_app_country] => US [patent_app_date] => 1992-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 9168 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/428/05428761.pdf [firstpage_image] =>[orig_patent_app_number] => 849887 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/849887
System for achieving atomic non-sequential multi-word operations in shared memory Mar 11, 1992 Issued
Array ( [id] => 2988722 [patent_doc_number] => 05226146 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-06 [patent_title] => 'Duplicate tag store purge queue' [patent_app_type] => 1 [patent_app_number] => 7/830961 [patent_app_country] => US [patent_app_date] => 1992-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5124 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/226/05226146.pdf [firstpage_image] =>[orig_patent_app_number] => 830961 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/830961
Duplicate tag store purge queue Feb 4, 1992 Issued
Array ( [id] => 3059212 [patent_doc_number] => 05287504 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'File alteration monitor for computer operating and file management system' [patent_app_type] => 1 [patent_app_number] => 7/882998 [patent_app_country] => US [patent_app_date] => 1991-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4793 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287504.pdf [firstpage_image] =>[orig_patent_app_number] => 882998 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/882998
File alteration monitor for computer operating and file management system Dec 30, 1991 Issued
07/793536 MEMORY ADDRESSING DEVICE Nov 17, 1991 Abandoned
Array ( [id] => 2976841 [patent_doc_number] => 05274784 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-28 [patent_title] => 'Data transfer using bus address lines' [patent_app_type] => 1 [patent_app_number] => 7/791468 [patent_app_country] => US [patent_app_date] => 1991-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6755 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/274/05274784.pdf [firstpage_image] =>[orig_patent_app_number] => 791468 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/791468
Data transfer using bus address lines Nov 12, 1991 Issued
Array ( [id] => 2951450 [patent_doc_number] => 05261073 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Method and apparatus for providing memory system status signals' [patent_app_type] => 1 [patent_app_number] => 7/786327 [patent_app_country] => US [patent_app_date] => 1991-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 6521 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 381 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/261/05261073.pdf [firstpage_image] =>[orig_patent_app_number] => 786327 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/786327
Method and apparatus for providing memory system status signals Oct 30, 1991 Issued
07/784568 TRANSLATING INSTRUCTION POINTER VIRTUAL ADDRESSES TO PHYSICAL ADDRESSES FOR ACCESSING AN INSTRUCTION CACHE Oct 28, 1991 Abandoned
Array ( [id] => 3058804 [patent_doc_number] => 05335333 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-02 [patent_title] => 'Guess mechanism for faster address calculation in a pipelined microprocessor' [patent_app_type] => 1 [patent_app_number] => 7/784566 [patent_app_country] => US [patent_app_date] => 1991-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3587 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/335/05335333.pdf [firstpage_image] =>[orig_patent_app_number] => 784566 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/784566
Guess mechanism for faster address calculation in a pipelined microprocessor Oct 28, 1991 Issued
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