Search

Phuong Chi Thi Nguyen

Examiner (ID: 7373)

Most Active Art Unit
2831
Art Unit(s)
2832, 2833, 2839, 2831, 2834
Total Applications
2578
Issued Applications
2322
Pending Applications
50
Abandoned Applications
233

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5467437 [patent_doc_number] => 20090327637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'SECURITY SYSTEM FOR COMPUTERS' [patent_app_type] => utility [patent_app_number] => 12/490809 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20090327637.pdf [firstpage_image] =>[orig_patent_app_number] => 12490809 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/490809
Security system for computers Jun 23, 2009 Issued
Array ( [id] => 8752030 [patent_doc_number] => 08417873 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-04-09 [patent_title] => 'Random read and read/write block accessible memory' [patent_app_type] => utility [patent_app_number] => 12/490914 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 9997 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12490914 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/490914
Random read and read/write block accessible memory Jun 23, 2009 Issued
Array ( [id] => 6227527 [patent_doc_number] => 20100058013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Online backup system with global two staged deduplication without using an indexing database' [patent_app_type] => utility [patent_app_number] => 12/490542 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6666 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20100058013.pdf [firstpage_image] =>[orig_patent_app_number] => 12490542 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/490542
Online backup system with global two staged deduplication without using an indexing database Jun 23, 2009 Issued
Array ( [id] => 8923886 [patent_doc_number] => 08489836 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-16 [patent_title] => 'Secure memory management system and method' [patent_app_type] => utility [patent_app_number] => 12/489712 [patent_app_country] => US [patent_app_date] => 2009-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3500 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 332 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12489712 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/489712
Secure memory management system and method Jun 22, 2009 Issued
Array ( [id] => 6252765 [patent_doc_number] => 20100138590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'CONTROL APPARATUS FOR CONTROLLING PERIPHERAL DEVICE, NON-VOLATILE STORAGE ELEMENT, AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/485044 [patent_app_country] => US [patent_app_date] => 2009-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20100138590.pdf [firstpage_image] =>[orig_patent_app_number] => 12485044 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/485044
Control apparatus for controlling peripheral device, non-volatile storage element, and method thereof Jun 15, 2009 Issued
Array ( [id] => 9416826 [patent_doc_number] => 08700878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'Event triggered memory mapped access' [patent_app_type] => utility [patent_app_number] => 12/485190 [patent_app_country] => US [patent_app_date] => 2009-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 10170 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12485190 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/485190
Event triggered memory mapped access Jun 15, 2009 Issued
Array ( [id] => 6395742 [patent_doc_number] => 20100318712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'SYSTEM AND METHOD FOR DISTRIBUTED PERSISTENT COMPUTING PLATFORM' [patent_app_type] => utility [patent_app_number] => 12/484801 [patent_app_country] => US [patent_app_date] => 2009-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8048 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20100318712.pdf [firstpage_image] =>[orig_patent_app_number] => 12484801 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/484801
System and method for distributed persistent computing platform Jun 14, 2009 Issued
Array ( [id] => 4586336 [patent_doc_number] => 07849268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Method of updating IC instruction and data cache' [patent_app_type] => utility [patent_app_number] => 12/422942 [patent_app_country] => US [patent_app_date] => 2009-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 17917 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/849/07849268.pdf [firstpage_image] =>[orig_patent_app_number] => 12422942 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/422942
Method of updating IC instruction and data cache Apr 12, 2009 Issued
Array ( [id] => 6510245 [patent_doc_number] => 20100095051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'Memory system and a control method thereof' [patent_app_type] => utility [patent_app_number] => 12/385228 [patent_app_country] => US [patent_app_date] => 2009-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5710 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20100095051.pdf [firstpage_image] =>[orig_patent_app_number] => 12385228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/385228
Memory system and a control method thereof Apr 1, 2009 Issued
Array ( [id] => 7682618 [patent_doc_number] => 20100241793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'STORAGE SYSTEM AND METHOD FOR CONTROLLING STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/596118 [patent_app_country] => US [patent_app_date] => 2009-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7873 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20100241793.pdf [firstpage_image] =>[orig_patent_app_number] => 12596118 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/596118
STORAGE SYSTEM AND METHOD FOR CONTROLLING STORAGE SYSTEM Mar 25, 2009 Abandoned
Array ( [id] => 7746208 [patent_doc_number] => 08108593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Memory system for flushing and relocating data' [patent_app_type] => utility [patent_app_number] => 12/396104 [patent_app_country] => US [patent_app_date] => 2009-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 34 [patent_no_of_words] => 34814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/108/08108593.pdf [firstpage_image] =>[orig_patent_app_number] => 12396104 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/396104
Memory system for flushing and relocating data Mar 1, 2009 Issued
Array ( [id] => 8728262 [patent_doc_number] => 08407402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Memory system and data erasing method therefor' [patent_app_type] => utility [patent_app_number] => 12/394720 [patent_app_country] => US [patent_app_date] => 2009-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 22009 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12394720 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/394720
Memory system and data erasing method therefor Feb 26, 2009 Issued
Array ( [id] => 5548004 [patent_doc_number] => 20090157881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'METHOD AND SYSTEM FOR GROUPING STORAGE SYSTEM COMPONENTS' [patent_app_type] => utility [patent_app_number] => 12/392484 [patent_app_country] => US [patent_app_date] => 2009-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7770 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20090157881.pdf [firstpage_image] =>[orig_patent_app_number] => 12392484 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/392484
Method and system for grouping storage system components Feb 24, 2009 Issued
Array ( [id] => 79329 [patent_doc_number] => 07752397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Repeated conflict acknowledgements in a cache coherency protocol' [patent_app_type] => utility [patent_app_number] => 12/351737 [patent_app_country] => US [patent_app_date] => 2009-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2246 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/752/07752397.pdf [firstpage_image] =>[orig_patent_app_number] => 12351737 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/351737
Repeated conflict acknowledgements in a cache coherency protocol Jan 8, 2009 Issued
Array ( [id] => 5356367 [patent_doc_number] => 20090187711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-23 [patent_title] => 'SYSTEM AND METHOD FOR PERFORMING AUXILIARY STORAGE OPERATIONS' [patent_app_type] => utility [patent_app_number] => 12/340365 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6014 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20090187711.pdf [firstpage_image] =>[orig_patent_app_number] => 12340365 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/340365
System and method for performing auxiliary storage operations Dec 18, 2008 Issued
Array ( [id] => 17402 [patent_doc_number] => 07805568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-28 [patent_title] => 'Method and apparatus for data storage using striping specification identification' [patent_app_type] => utility [patent_app_number] => 12/290555 [patent_app_country] => US [patent_app_date] => 2008-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7963 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/805/07805568.pdf [firstpage_image] =>[orig_patent_app_number] => 12290555 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/290555
Method and apparatus for data storage using striping specification identification Oct 30, 2008 Issued
Array ( [id] => 48632 [patent_doc_number] => 07779204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'System and computer readable medium for highly available removable storage network environment' [patent_app_type] => utility [patent_app_number] => 12/258333 [patent_app_country] => US [patent_app_date] => 2008-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3592 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 506 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/779/07779204.pdf [firstpage_image] =>[orig_patent_app_number] => 12258333 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/258333
System and computer readable medium for highly available removable storage network environment Oct 23, 2008 Issued
Array ( [id] => 5362871 [patent_doc_number] => 20090037665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'HIDING CONFLICT, COHERENCE COMPLETION AND TRANSACTION ID ELEMENTS OF A COHERENCE PROTOCOL' [patent_app_type] => utility [patent_app_number] => 12/251329 [patent_app_country] => US [patent_app_date] => 2008-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20090037665.pdf [firstpage_image] =>[orig_patent_app_number] => 12251329 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/251329
Hiding conflict, coherence completion and transaction ID elements of a coherence protocol Oct 13, 2008 Issued
Array ( [id] => 5273529 [patent_doc_number] => 20090077305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'Flexible Sequencer Design Architecture for Solid State Memory Controller' [patent_app_type] => utility [patent_app_number] => 12/212636 [patent_app_country] => US [patent_app_date] => 2008-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 15450 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20090077305.pdf [firstpage_image] =>[orig_patent_app_number] => 12212636 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/212636
Flexible sequencer design architecture for solid state memory controller Sep 16, 2008 Issued
Array ( [id] => 6297849 [patent_doc_number] => 20100067133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'COMMAND SUSPENSION IN RESPONSE, AT LEAST IN PART, TO DETECTED ACCELERATION AND/OR ORIENTATION CHANGE' [patent_app_type] => utility [patent_app_number] => 12/212384 [patent_app_country] => US [patent_app_date] => 2008-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4743 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20100067133.pdf [firstpage_image] =>[orig_patent_app_number] => 12212384 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/212384
Command suspension in response, at least in part, to detected acceleration and/or orientation change Sep 16, 2008 Issued
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