Search

Phuong Chi Thi Nguyen

Examiner (ID: 7373)

Most Active Art Unit
2831
Art Unit(s)
2832, 2833, 2839, 2831, 2834
Total Applications
2578
Issued Applications
2322
Pending Applications
50
Abandoned Applications
233

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 843592 [patent_doc_number] => 07392349 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-06-24 [patent_title] => 'Table management within a policy-based routing system' [patent_app_type] => utility [patent_app_number] => 11/045575 [patent_app_country] => US [patent_app_date] => 2005-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7356 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/392/07392349.pdf [firstpage_image] =>[orig_patent_app_number] => 11045575 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/045575
Table management within a policy-based routing system Jan 25, 2005 Issued
Array ( [id] => 5879108 [patent_doc_number] => 20060168401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Method and structure for high-performance linear algebra in the presence of limited outstanding miss slots' [patent_app_type] => utility [patent_app_number] => 11/041935 [patent_app_country] => US [patent_app_date] => 2005-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20060168401.pdf [firstpage_image] =>[orig_patent_app_number] => 11041935 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/041935
Method and structure for high-performance linear algebra in the presence of limited outstanding miss slots Jan 25, 2005 Abandoned
Array ( [id] => 5650955 [patent_doc_number] => 20060136690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Storage device having independent storage areas and password protection method thereof' [patent_app_type] => utility [patent_app_number] => 11/041966 [patent_app_country] => US [patent_app_date] => 2005-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2528 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20060136690.pdf [firstpage_image] =>[orig_patent_app_number] => 11041966 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/041966
Storage device having independent storage areas and password protection method thereof Jan 25, 2005 Abandoned
Array ( [id] => 325135 [patent_doc_number] => 07519789 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-04-14 [patent_title] => 'Method and system for dynamically selecting a clock edge for read data recovery' [patent_app_type] => utility [patent_app_number] => 11/039366 [patent_app_country] => US [patent_app_date] => 2005-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4695 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/519/07519789.pdf [firstpage_image] =>[orig_patent_app_number] => 11039366 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/039366
Method and system for dynamically selecting a clock edge for read data recovery Jan 19, 2005 Issued
Array ( [id] => 5597683 [patent_doc_number] => 20060161601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Heap manager and application programming interface support for managing versions of objects' [patent_app_type] => utility [patent_app_number] => 11/037024 [patent_app_country] => US [patent_app_date] => 2005-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6623 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20060161601.pdf [firstpage_image] =>[orig_patent_app_number] => 11037024 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/037024
Heap manager and application programming interface support for managing versions of objects Jan 17, 2005 Abandoned
Array ( [id] => 873416 [patent_doc_number] => 07366836 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-04-29 [patent_title] => 'Software system for providing storage system functionality' [patent_app_type] => utility [patent_app_number] => 11/021892 [patent_app_country] => US [patent_app_date] => 2004-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 18227 [patent_no_of_claims] => 90 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/366/07366836.pdf [firstpage_image] =>[orig_patent_app_number] => 11021892 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/021892
Software system for providing storage system functionality Dec 22, 2004 Issued
Array ( [id] => 8183006 [patent_doc_number] => 08180976 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-15 [patent_title] => 'Programming non-volatile memory devices based on data logic values' [patent_app_type] => utility [patent_app_number] => 10/982560 [patent_app_country] => US [patent_app_date] => 2004-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8040 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/180/08180976.pdf [firstpage_image] =>[orig_patent_app_number] => 10982560 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/982560
Programming non-volatile memory devices based on data logic values Nov 4, 2004 Issued
Array ( [id] => 908410 [patent_doc_number] => 07337283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Method and system for managing storage reservation' [patent_app_type] => utility [patent_app_number] => 10/981672 [patent_app_country] => US [patent_app_date] => 2004-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 7954 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/337/07337283.pdf [firstpage_image] =>[orig_patent_app_number] => 10981672 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/981672
Method and system for managing storage reservation Nov 4, 2004 Issued
Array ( [id] => 388540 [patent_doc_number] => 07305526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Method, system, and program for transferring data directed to virtual memory addresses to a device memory' [patent_app_type] => utility [patent_app_number] => 10/982354 [patent_app_country] => US [patent_app_date] => 2004-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2867 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/305/07305526.pdf [firstpage_image] =>[orig_patent_app_number] => 10982354 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/982354
Method, system, and program for transferring data directed to virtual memory addresses to a device memory Nov 4, 2004 Issued
Array ( [id] => 5822281 [patent_doc_number] => 20060026594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Multithread processor and thread switching control method' [patent_app_type] => utility [patent_app_number] => 10/981772 [patent_app_country] => US [patent_app_date] => 2004-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 11095 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20060026594.pdf [firstpage_image] =>[orig_patent_app_number] => 10981772 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/981772
Multithread processor and thread switching control method Nov 4, 2004 Issued
Array ( [id] => 5809300 [patent_doc_number] => 20060095655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Synchronous interface and method of operation' [patent_app_type] => utility [patent_app_number] => 10/981043 [patent_app_country] => US [patent_app_date] => 2004-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3136 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20060095655.pdf [firstpage_image] =>[orig_patent_app_number] => 10981043 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/981043
Synchronous interface and method of operation Nov 3, 2004 Abandoned
Array ( [id] => 384658 [patent_doc_number] => 07308538 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-11 [patent_title] => 'Scope-based cache coherence' [patent_app_type] => utility [patent_app_number] => 10/981370 [patent_app_country] => US [patent_app_date] => 2004-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6748 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/308/07308538.pdf [firstpage_image] =>[orig_patent_app_number] => 10981370 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/981370
Scope-based cache coherence Nov 3, 2004 Issued
Array ( [id] => 526691 [patent_doc_number] => 07200719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-03 [patent_title] => 'Prefetch control in a data processing system' [patent_app_type] => utility [patent_app_number] => 10/631136 [patent_app_country] => US [patent_app_date] => 2004-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5203 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/200/07200719.pdf [firstpage_image] =>[orig_patent_app_number] => 10631136 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631136
Prefetch control in a data processing system Sep 8, 2004 Issued
Array ( [id] => 1078845 [patent_doc_number] => 07617365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-10 [patent_title] => 'Systems and methods to avoid deadlock and guarantee mirror consistency during online mirror synchronization and verification' [patent_app_type] => utility [patent_app_number] => 10/931325 [patent_app_country] => US [patent_app_date] => 2004-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 54 [patent_no_of_words] => 25578 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 383 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/617/07617365.pdf [firstpage_image] =>[orig_patent_app_number] => 10931325 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/931325
Systems and methods to avoid deadlock and guarantee mirror consistency during online mirror synchronization and verification Aug 30, 2004 Issued
Array ( [id] => 7160270 [patent_doc_number] => 20050027956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'System and method for using file system snapshots for online data backup' [patent_app_type] => utility [patent_app_number] => 10/925928 [patent_app_country] => US [patent_app_date] => 2004-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9920 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20050027956.pdf [firstpage_image] =>[orig_patent_app_number] => 10925928 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/925928
System and method for using file system snapshots for online data backup Aug 25, 2004 Issued
Array ( [id] => 146467 [patent_doc_number] => 07689763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Method and system for reducing pin count in an integrated circuit when interfacing to a memory' [patent_app_type] => utility [patent_app_number] => 10/920975 [patent_app_country] => US [patent_app_date] => 2004-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4426 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/689/07689763.pdf [firstpage_image] =>[orig_patent_app_number] => 10920975 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/920975
Method and system for reducing pin count in an integrated circuit when interfacing to a memory Aug 17, 2004 Issued
Array ( [id] => 593349 [patent_doc_number] => 07461211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-02 [patent_title] => 'System, apparatus and method for generating nonsequential predictions to access a memory' [patent_app_type] => utility [patent_app_number] => 10/920682 [patent_app_country] => US [patent_app_date] => 2004-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7158 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/461/07461211.pdf [firstpage_image] =>[orig_patent_app_number] => 10920682 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/920682
System, apparatus and method for generating nonsequential predictions to access a memory Aug 16, 2004 Issued
Array ( [id] => 599922 [patent_doc_number] => 07441087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'System, apparatus and method for issuing predictions from an inventory to access a memory' [patent_app_type] => utility [patent_app_number] => 10/920610 [patent_app_country] => US [patent_app_date] => 2004-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5941 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/441/07441087.pdf [firstpage_image] =>[orig_patent_app_number] => 10920610 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/920610
System, apparatus and method for issuing predictions from an inventory to access a memory Aug 16, 2004 Issued
Array ( [id] => 839837 [patent_doc_number] => 07395382 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-01 [patent_title] => 'Hybrid software/hardware transactional memory' [patent_app_type] => utility [patent_app_number] => 10/915502 [patent_app_country] => US [patent_app_date] => 2004-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 21324 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/395/07395382.pdf [firstpage_image] =>[orig_patent_app_number] => 10915502 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/915502
Hybrid software/hardware transactional memory Aug 9, 2004 Issued
Array ( [id] => 7063144 [patent_doc_number] => 20050005064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Security for logical unit in storage subsystem' [patent_app_type] => utility [patent_app_number] => 10/902794 [patent_app_country] => US [patent_app_date] => 2004-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8713 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20050005064.pdf [firstpage_image] =>[orig_patent_app_number] => 10902794 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/902794
Security for logical unit in storage subsystem Aug 1, 2004 Issued
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