Search

Phuong M. Phu

Examiner (ID: 7083)

Most Active Art Unit
2632
Art Unit(s)
2634, 2734, 2611, 2632, 2631
Total Applications
1981
Issued Applications
1792
Pending Applications
87
Abandoned Applications
136

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18343783 [patent_doc_number] => 11641268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-02 [patent_title] => Asynchronous chip-to-chip communication [patent_app_type] => utility [patent_app_number] => 17/570145 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4764 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17570145 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/570145
Asynchronous chip-to-chip communication Jan 5, 2022 Issued
Array ( [id] => 18387996 [patent_doc_number] => 11658795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Clock and data recovery circuit and receiver [patent_app_type] => utility [patent_app_number] => 17/569502 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4954 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569502 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569502
Clock and data recovery circuit and receiver Jan 5, 2022 Issued
Array ( [id] => 18387834 [patent_doc_number] => 11658631 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-05-23 [patent_title] => System and method for automatically tuning an audio system [patent_app_type] => utility [patent_app_number] => 17/569013 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4186 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569013
System and method for automatically tuning an audio system Jan 4, 2022 Issued
Array ( [id] => 19109264 [patent_doc_number] => 11962384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Apparatus for correcting deviation between a plurality of transmission channels and wireless communications device [patent_app_type] => utility [patent_app_number] => 17/563703 [patent_app_country] => US [patent_app_date] => 2021-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 46 [patent_no_of_words] => 28224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 351 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17563703 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/563703
Apparatus for correcting deviation between a plurality of transmission channels and wireless communications device Dec 27, 2021 Issued
Array ( [id] => 18175767 [patent_doc_number] => 11575494 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-07 [patent_title] => Link status detection for a high-speed signaling interconnect [patent_app_type] => utility [patent_app_number] => 17/556512 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556512 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556512
Link status detection for a high-speed signaling interconnect Dec 19, 2021 Issued
Array ( [id] => 17537382 [patent_doc_number] => 20220115991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => DEVICE AND METHOD FOR COMPENSATING FOR NONLINEARITY OF POWER AMPLIFIER [patent_app_type] => utility [patent_app_number] => 17/645076 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11014 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645076 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645076
Device and method for compensating for nonlinearity of power amplifier Dec 19, 2021 Issued
Array ( [id] => 18416553 [patent_doc_number] => 11671104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Clock recovery circuit, clock data recovery circuit, and apparatus including the same [patent_app_type] => utility [patent_app_number] => 17/556007 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10166 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556007
Clock recovery circuit, clock data recovery circuit, and apparatus including the same Dec 19, 2021 Issued
Array ( [id] => 18358369 [patent_doc_number] => 11646780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Signal generating method and signal generating device [patent_app_type] => utility [patent_app_number] => 17/555882 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 109 [patent_figures_cnt] => 127 [patent_no_of_words] => 108170 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555882 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/555882
Signal generating method and signal generating device Dec 19, 2021 Issued
Array ( [id] => 19008782 [patent_doc_number] => 20240072853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => AN IMPROVED SIGNAL PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 18/261707 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18261707 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/261707
Signal processing method Dec 16, 2021 Issued
Array ( [id] => 19008782 [patent_doc_number] => 20240072853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => AN IMPROVED SIGNAL PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 18/261707 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18261707 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/261707
Signal processing method Dec 16, 2021 Issued
Array ( [id] => 18858479 [patent_doc_number] => 11856082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Widespread equispatiated phase generation of a clock divided by a non-integer factor [patent_app_type] => utility [patent_app_number] => 17/552490 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9515 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17552490 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/552490
Widespread equispatiated phase generation of a clock divided by a non-integer factor Dec 15, 2021 Issued
Array ( [id] => 18175769 [patent_doc_number] => 11575496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-07 [patent_title] => Retiming circuit module, signal transmission system and signal transmission method [patent_app_type] => utility [patent_app_number] => 17/547241 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5883 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17547241 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/547241
Retiming circuit module, signal transmission system and signal transmission method Dec 9, 2021 Issued
Array ( [id] => 17693486 [patent_doc_number] => 20220200779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => COMMUNICATION APPARATUS, METHOD OF CONTROLLING COMMUNICATION APPARATUS, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/548014 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12234 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548014 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548014
Communication apparatus, method of controlling communication apparatus, and storage medium Dec 9, 2021 Issued
Array ( [id] => 18318132 [patent_doc_number] => 11632227 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Signal interpolation method and measurement instrument [patent_app_type] => utility [patent_app_number] => 17/543241 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3860 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17543241 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/543241
Signal interpolation method and measurement instrument Dec 5, 2021 Issued
Array ( [id] => 17510100 [patent_doc_number] => 20220103204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => METHOD AND DEVICE FOR TRANSMITTING DATA BY USING POWER LINE, AND METHOD AND DEVICE FOR RECEIVING DATA BY USING POWER LINE [patent_app_type] => utility [patent_app_number] => 17/457691 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457691 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/457691
Method and device for transmitting data by using power line, and method and device for receiving data by using power line Dec 5, 2021 Issued
Array ( [id] => 18121373 [patent_doc_number] => 11552777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Time domains synchronization in a system on chip [patent_app_type] => utility [patent_app_number] => 17/457354 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6124 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457354 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/457354
Time domains synchronization in a system on chip Dec 1, 2021 Issued
Array ( [id] => 18849816 [patent_doc_number] => 20230412220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => METHOD AND SYSTEM FOR UNSUPERVISED USER CLUSTERING AND POWER ALLOCATION IN NON-ORTHOGONAL MULTIPLE ACCESS (NOMA)-AIDED MASSIVE MULTIPLE INPUT-MULTIPLE OUTPUT (MIMO) NETWORKS [patent_app_type] => utility [patent_app_number] => 18/252096 [patent_app_country] => US [patent_app_date] => 2021-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18252096 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/252096
Method and system for unsupervised user clustering and power allocation in non-orthogonal multiple access (NOMA)-aided massive multiple input-multiple output (MIMO) networks Nov 30, 2021 Issued
Array ( [id] => 18849816 [patent_doc_number] => 20230412220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => METHOD AND SYSTEM FOR UNSUPERVISED USER CLUSTERING AND POWER ALLOCATION IN NON-ORTHOGONAL MULTIPLE ACCESS (NOMA)-AIDED MASSIVE MULTIPLE INPUT-MULTIPLE OUTPUT (MIMO) NETWORKS [patent_app_type] => utility [patent_app_number] => 18/252096 [patent_app_country] => US [patent_app_date] => 2021-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18252096 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/252096
Method and system for unsupervised user clustering and power allocation in non-orthogonal multiple access (NOMA)-aided massive multiple input-multiple output (MIMO) networks Nov 30, 2021 Issued
Array ( [id] => 18594107 [patent_doc_number] => 11743024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Communication device and communication system [patent_app_type] => utility [patent_app_number] => 17/536751 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 14773 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536751 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536751
Communication device and communication system Nov 28, 2021 Issued
Array ( [id] => 18640163 [patent_doc_number] => 11764795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Fractional phase locked loop (PLL) with digital control driven by clock with higher frequency than PLL feedback signal [patent_app_type] => utility [patent_app_number] => 17/537264 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6639 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17537264 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/537264
Fractional phase locked loop (PLL) with digital control driven by clock with higher frequency than PLL feedback signal Nov 28, 2021 Issued
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