Pierre E Elisca
Examiner (ID: 9174, Phone: (571)272-6706 , Office: P/3716 )
Most Active Art Unit | 3715 |
Art Unit(s) | 3718, 2785, 3714, 3716, 2131, 3621, 2161, 3715 |
Total Applications | 2631 |
Issued Applications | 2140 |
Pending Applications | 221 |
Abandoned Applications | 269 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 10710081
[patent_doc_number] => 20160056228
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-02-25
[patent_title] => 'CAPACITOR HAVING A GRAPHENE STRUCTURE, SEMICONDUCTOR DEVICE INCLUDING THE CAPACITOR AND METHOD OF FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/464497
[patent_app_country] => US
[patent_app_date] => 2014-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4690
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14464497
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/464497 | Capacitor having a graphene structure, semiconductor device including the capacitor and method of forming the same | Aug 19, 2014 | Issued |
Array
(
[id] => 12294180
[patent_doc_number] => 09935081
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-03
[patent_title] => Hybrid interconnect for chip stacking
[patent_app_type] => utility
[patent_app_number] => 14/464509
[patent_app_country] => US
[patent_app_date] => 2014-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5675
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14464509
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/464509 | Hybrid interconnect for chip stacking | Aug 19, 2014 | Issued |
Array
(
[id] => 10710148
[patent_doc_number] => 20160056295
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-02-25
[patent_title] => 'FinFET Transistor with U-Shaped Channel'
[patent_app_type] => utility
[patent_app_number] => 14/464498
[patent_app_country] => US
[patent_app_date] => 2014-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6147
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14464498
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/464498 | FinFET transistor with u-shaped channel | Aug 19, 2014 | Issued |
Array
(
[id] => 10394665
[patent_doc_number] => 20150279673
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-01
[patent_title] => 'THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/463581
[patent_app_country] => US
[patent_app_date] => 2014-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5980
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14463581
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/463581 | Thin film transistor array panel having an oxide semiconductor including silicon | Aug 18, 2014 | Issued |
Array
(
[id] => 11740142
[patent_doc_number] => 09704735
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-11
[patent_title] => 'Dual side solder resist layers for coreless packages and packages with an embedded interconnect bridge and their methods of fabrication'
[patent_app_type] => utility
[patent_app_number] => 14/463285
[patent_app_country] => US
[patent_app_date] => 2014-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 29
[patent_no_of_words] => 10100
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14463285
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/463285 | Dual side solder resist layers for coreless packages and packages with an embedded interconnect bridge and their methods of fabrication | Aug 18, 2014 | Issued |
Array
(
[id] => 11483439
[patent_doc_number] => 09589995
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-07
[patent_title] => 'TFT substrate having three parallel capacitors'
[patent_app_type] => utility
[patent_app_number] => 14/384661
[patent_app_country] => US
[patent_app_date] => 2014-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 4407
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 346
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14384661
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/384661 | TFT substrate having three parallel capacitors | Aug 14, 2014 | Issued |
Array
(
[id] => 10935697
[patent_doc_number] => 20140338717
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-20
[patent_title] => 'THERMOELECTRIC CONVERSION DEVICE AND FABRICATION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/449260
[patent_app_country] => US
[patent_app_date] => 2014-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5939
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14449260
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/449260 | Thermoelectric conversion device having perovskite crystal including grain domain | Jul 31, 2014 | Issued |
Array
(
[id] => 10590770
[patent_doc_number] => 09312393
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-12
[patent_title] => 'Transistor having tapered gate electrode'
[patent_app_type] => utility
[patent_app_number] => 14/334099
[patent_app_country] => US
[patent_app_date] => 2014-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 59
[patent_no_of_words] => 15713
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334099
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/334099 | Transistor having tapered gate electrode | Jul 16, 2014 | Issued |
Array
(
[id] => 10924137
[patent_doc_number] => 20140327157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-06
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 14/332394
[patent_app_country] => US
[patent_app_date] => 2014-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 6849
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14332394
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/332394 | Semiconductor device having stacked chips, a re-distribution layer, and penetration electrodes | Jul 15, 2014 | Issued |
Array
(
[id] => 14828345
[patent_doc_number] => 10411189
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-09-10
[patent_title] => Display panel having cathode connected to auxiliary electrode through conductive spacers and manufacturing method thereof, and display device
[patent_app_type] => utility
[patent_app_number] => 14/422271
[patent_app_country] => US
[patent_app_date] => 2014-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 5433
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14422271
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/422271 | Display panel having cathode connected to auxiliary electrode through conductive spacers and manufacturing method thereof, and display device | Jul 14, 2014 | Issued |
Array
(
[id] => 11365572
[patent_doc_number] => 20170003553
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-05
[patent_title] => 'ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/436066
[patent_app_country] => US
[patent_app_date] => 2014-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6370
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14436066
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/436066 | Array substrate having partially oxidized source electrode, drain electrode and data line | Jul 10, 2014 | Issued |
Array
(
[id] => 10544762
[patent_doc_number] => 09269900
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-23
[patent_title] => 'Methods of depositing phase change materials and methods of forming memory'
[patent_app_type] => utility
[patent_app_number] => 14/313850
[patent_app_country] => US
[patent_app_date] => 2014-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 6570
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14313850
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/313850 | Methods of depositing phase change materials and methods of forming memory | Jun 23, 2014 | Issued |
Array
(
[id] => 9783115
[patent_doc_number] => 20140299935
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-09
[patent_title] => 'SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPACER AND BOTTOM LINER'
[patent_app_type] => utility
[patent_app_number] => 14/308816
[patent_app_country] => US
[patent_app_date] => 2014-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5339
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14308816
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/308816 | SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPACER AND BOTTOM LINER | Jun 18, 2014 | Abandoned |
Array
(
[id] => 10950742
[patent_doc_number] => 20140353763
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-04
[patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING FIN-FETS AND METHODS OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/287322
[patent_app_country] => US
[patent_app_date] => 2014-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 9137
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14287322
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/287322 | SEMICONDUCTOR DEVICES INCLUDING FIN-FETS AND METHODS OF FABRICATING THE SAME | May 26, 2014 | Abandoned |
Array
(
[id] => 10697200
[patent_doc_number] => 20160043347
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-02-11
[patent_title] => 'FILM PACKAGING STRUCTURE FOR OLED, OLED DEVICE AND DISPLAY APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 14/415481
[patent_app_country] => US
[patent_app_date] => 2014-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2387
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14415481
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/415481 | Packaging structure for OLED having inorganic and organic films with moisture absorbent layers | May 22, 2014 | Issued |
Array
(
[id] => 11564781
[patent_doc_number] => 09627376
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-18
[patent_title] => 'Semiconductor device with active fins separated by shallow and deep trench isolations and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 14/281224
[patent_app_country] => US
[patent_app_date] => 2014-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 25
[patent_no_of_words] => 9629
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14281224
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/281224 | Semiconductor device with active fins separated by shallow and deep trench isolations and method for fabricating the same | May 18, 2014 | Issued |
Array
(
[id] => 10936623
[patent_doc_number] => 20140339644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-20
[patent_title] => 'SEMICONDUCTOR UNIT AND ELECTRONIC APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 14/271805
[patent_app_country] => US
[patent_app_date] => 2014-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7557
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14271805
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/271805 | Semiconductor unit with proection circuit and electronic apparatus | May 6, 2014 | Issued |
Array
(
[id] => 13640575
[patent_doc_number] => 09847248
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-12-19
[patent_title] => Method of making a stacked device assembly
[patent_app_type] => utility
[patent_app_number] => 14/272295
[patent_app_country] => US
[patent_app_date] => 2014-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3911
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14272295
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/272295 | Method of making a stacked device assembly | May 6, 2014 | Issued |
Array
(
[id] => 11781861
[patent_doc_number] => 09391061
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-07-12
[patent_title] => 'Uni-directional transient voltage suppressor (TVS)'
[patent_app_type] => utility
[patent_app_number] => 14/263711
[patent_app_country] => US
[patent_app_date] => 2014-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 5025
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14263711
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/263711 | Uni-directional transient voltage suppressor (TVS) | Apr 27, 2014 | Issued |
Array
(
[id] => 10971791
[patent_doc_number] => 20140374827
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-25
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/259212
[patent_app_country] => US
[patent_app_date] => 2014-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 7316
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14259212
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/259212 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | Apr 22, 2014 | Abandoned |