Pierre E Elisca
Examiner (ID: 9174, Phone: (571)272-6706 , Office: P/3716 )
Most Active Art Unit | 3715 |
Art Unit(s) | 3718, 2785, 3714, 3716, 2131, 3621, 2161, 3715 |
Total Applications | 2631 |
Issued Applications | 2140 |
Pending Applications | 221 |
Abandoned Applications | 269 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9504231
[patent_doc_number] => 08742549
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[patent_title] => 'Shallow trench isolation structure'
[patent_app_type] => utility
[patent_app_number] => 13/239375
[patent_app_country] => US
[patent_app_date] => 2011-09-21
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Array
(
[id] => 7711281
[patent_doc_number] => 20120003829
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[patent_issue_date] => 2012-01-05
[patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
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[patent_app_date] => 2011-09-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/228397 | Metal-insulator-metal capacitor alloying process | Sep 7, 2011 | Issued |
Array
(
[id] => 7807634
[patent_doc_number] => 20120058588
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[patent_kind] => A1
[patent_issue_date] => 2012-03-08
[patent_title] => 'DEVICE AND METHOD FOR SIMULTANEOUSLY MICROSTRUCTURING AND DOPING SEMICONDUCTOR SUBSTRATES'
[patent_app_type] => utility
[patent_app_number] => 13/223379
[patent_app_country] => US
[patent_app_date] => 2011-09-01
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[firstpage_image] =>[orig_patent_app_number] => 13223379
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Array
(
[id] => 8684524
[patent_doc_number] => 20130052808
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[patent_kind] => A1
[patent_issue_date] => 2013-02-28
[patent_title] => 'METHOD OF DEPOSITING HIGHLY CONFORMAL AMORPHOUS CARBON FILMS OVER RAISED FEATURES'
[patent_app_type] => utility
[patent_app_number] => 13/217813
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[patent_app_date] => 2011-08-25
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/217813 | Method of depositing highly conformal amorphous carbon films over raised features | Aug 24, 2011 | Issued |
Array
(
[id] => 8210150
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[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'METHOD FOR MANUFACTURING LIQUID CRYSTAL DISPLAY PIXEL ARRAY'
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Array
(
[id] => 8680921
[patent_doc_number] => 20130049205
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[patent_issue_date] => 2013-02-28
[patent_title] => 'Semiconductor Device and Method of Manufacturing a Semiconductor Device Including Grinding Steps'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/218265 | Chip with encapsulated sides and exposed surface | Aug 24, 2011 | Issued |
Array
(
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[patent_issue_date] => 2013-10-01
[patent_title] => 'Phosphor film, method of forming the same, and method of coating phosphor layer on LED chips'
[patent_app_type] => utility
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Array
(
[id] => 9140234
[patent_doc_number] => 08580694
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-12
[patent_title] => 'Method of patterning hard mask layer for defining deep trench'
[patent_app_type] => utility
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Array
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[id] => 8684475
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[patent_title] => 'VERTICAL SOLID-STATE TRANSDUCERS HAVING BACKSIDE TERMINALS AND ASSOCIATED SYSTEMS AND METHODS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/218289 | Vertical solid-state transducers having backside terminals and associated systems and methods | Aug 24, 2011 | Issued |
Array
(
[id] => 10158477
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[patent_title] => 'Layer alignment in FinFET fabrication'
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Array
(
[id] => 8240454
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[patent_title] => 'METHOD FOR MANUFACTURING INTEGRATED CIRCUIT DEVICE'
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Array
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[id] => 8684496
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Array
(
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Array
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Array
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Array
(
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Array
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