Search

Pierre E Elisca

Examiner (ID: 9174, Phone: (571)272-6706 , Office: P/3716 )

Most Active Art Unit
3715
Art Unit(s)
3718, 2785, 3714, 3716, 2131, 3621, 2161, 3715
Total Applications
2631
Issued Applications
2140
Pending Applications
221
Abandoned Applications
269

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8180131 [patent_doc_number] => 20120112279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'CONTACTS FOR FET DEVICES' [patent_app_type] => utility [patent_app_number] => 12/941042 [patent_app_country] => US [patent_app_date] => 2010-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3614 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20120112279.pdf [firstpage_image] =>[orig_patent_app_number] => 12941042 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/941042
Contacts for FET devices Nov 5, 2010 Issued
Array ( [id] => 8333221 [patent_doc_number] => 20120199921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'SENSOR DEVICE AND METHOD FOR PRODUCING SENSOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/502083 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 9176 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13502083 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/502083
Sensor device having electrode draw-out portions through side of substrate Oct 12, 2010 Issued
Array ( [id] => 8146611 [patent_doc_number] => 08163620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-24 [patent_title] => 'Method for etching Mo-based metal gate stack with aluminium nitride barrier' [patent_app_type] => utility [patent_app_number] => 13/001493 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2689 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/163/08163620.pdf [firstpage_image] =>[orig_patent_app_number] => 13001493 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/001493
Method for etching Mo-based metal gate stack with aluminium nitride barrier Sep 20, 2010 Issued
Array ( [id] => 8205066 [patent_doc_number] => 20120126284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/388565 [patent_app_country] => US [patent_app_date] => 2010-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4543 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20120126284.pdf [firstpage_image] =>[orig_patent_app_number] => 13388565 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/388565
Semiconductor device having plurality of peripheral trenches in peripheral region around cell region Aug 24, 2010 Issued
Array ( [id] => 6384401 [patent_doc_number] => 20100317188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'FLUORINE DOPED CARBON FILMS PRODUCED BY MODIFICATION BY RADICALS' [patent_app_type] => utility [patent_app_number] => 12/858162 [patent_app_country] => US [patent_app_date] => 2010-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7874 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0317/20100317188.pdf [firstpage_image] =>[orig_patent_app_number] => 12858162 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/858162
Noble metal barrier for fluorine-doped carbon films Aug 16, 2010 Issued
Array ( [id] => 6375153 [patent_doc_number] => 20100301342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'INCREASED GRAIN SIZE IN METAL WIRING STRUCTURES THROUGH FLASH TUBE IRRADIATION' [patent_app_type] => utility [patent_app_number] => 12/851290 [patent_app_country] => US [patent_app_date] => 2010-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9354 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0301/20100301342.pdf [firstpage_image] =>[orig_patent_app_number] => 12851290 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/851290
INCREASED GRAIN SIZE IN METAL WIRING STRUCTURES THROUGH FLASH TUBE IRRADIATION Aug 4, 2010 Abandoned
Array ( [id] => 8375234 [patent_doc_number] => 08258025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Method for manufacturing microcrystalline semiconductor film and thin film transistor' [patent_app_type] => utility [patent_app_number] => 12/848594 [patent_app_country] => US [patent_app_date] => 2010-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 16275 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12848594 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/848594
Method for manufacturing microcrystalline semiconductor film and thin film transistor Aug 1, 2010 Issued
Array ( [id] => 7755874 [patent_doc_number] => 20120028439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'Semiconductor And Solar Wafers And Method For Processing Same' [patent_app_type] => utility [patent_app_number] => 12/847007 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3080 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20120028439.pdf [firstpage_image] =>[orig_patent_app_number] => 12847007 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/847007
Semiconductor And Solar Wafers And Method For Processing Same Jul 29, 2010 Abandoned
Array ( [id] => 7773939 [patent_doc_number] => 08119494 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-02-21 [patent_title] => 'Defect-free hetero-epitaxy of lattice mismatched semiconductors' [patent_app_type] => utility [patent_app_number] => 12/846307 [patent_app_country] => US [patent_app_date] => 2010-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 2763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/119/08119494.pdf [firstpage_image] =>[orig_patent_app_number] => 12846307 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/846307
Defect-free hetero-epitaxy of lattice mismatched semiconductors Jul 28, 2010 Issued
Array ( [id] => 8543241 [patent_doc_number] => 08318530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Solar cell buffer layer having varying composition' [patent_app_type] => utility [patent_app_number] => 12/843778 [patent_app_country] => US [patent_app_date] => 2010-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5098 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12843778 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/843778
Solar cell buffer layer having varying composition Jul 25, 2010 Issued
Array ( [id] => 6235498 [patent_doc_number] => 20100267202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'METHOD OF FABRICATING STACKED SEMICONDUCTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/829704 [patent_app_country] => US [patent_app_date] => 2010-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4211 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20100267202.pdf [firstpage_image] =>[orig_patent_app_number] => 12829704 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/829704
Method of fabricating stacked semiconductor structure Jul 1, 2010 Issued
Array ( [id] => 8294327 [patent_doc_number] => 08222098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Semiconductor device having first and second source and drain electrodes sandwiched between an island-shaped semiconductor film' [patent_app_type] => utility [patent_app_number] => 12/824899 [patent_app_country] => US [patent_app_date] => 2010-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 59 [patent_no_of_words] => 15804 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12824899 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/824899
Semiconductor device having first and second source and drain electrodes sandwiched between an island-shaped semiconductor film Jun 27, 2010 Issued
Array ( [id] => 6273893 [patent_doc_number] => 20100255671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/817675 [patent_app_country] => US [patent_app_date] => 2010-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4727 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20100255671.pdf [firstpage_image] =>[orig_patent_app_number] => 12817675 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/817675
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Jun 16, 2010 Abandoned
Array ( [id] => 8294313 [patent_doc_number] => 08222111 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-07-17 [patent_title] => 'Simultaneous formation of a top oxide layer in a silicon-oxide-nitride-oxide-silicon (SONOS) transistor and a gate oxide in a metal oxide semiconductor (MOS)' [patent_app_type] => utility [patent_app_number] => 12/782699 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4885 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12782699 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/782699
Simultaneous formation of a top oxide layer in a silicon-oxide-nitride-oxide-silicon (SONOS) transistor and a gate oxide in a metal oxide semiconductor (MOS) May 17, 2010 Issued
Array ( [id] => 6111630 [patent_doc_number] => 20110189799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'Method for Transferring a Nano Material from a Substrate to Another Substrate' [patent_app_type] => utility [patent_app_number] => 12/782610 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3261 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20110189799.pdf [firstpage_image] =>[orig_patent_app_number] => 12782610 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/782610
Method for transferring a nano material from a substrate to another substrate May 17, 2010 Issued
Array ( [id] => 6324175 [patent_doc_number] => 20100197085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'Method of manufacturing an organic thin film transistor' [patent_app_type] => utility [patent_app_number] => 12/662192 [patent_app_country] => US [patent_app_date] => 2010-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10057 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20100197085.pdf [firstpage_image] =>[orig_patent_app_number] => 12662192 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/662192
Method of manufacturing an organic thin film transistor Apr 4, 2010 Issued
Array ( [id] => 7732545 [patent_doc_number] => 20120015453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'PHOTOVOLTAIC CELL MANUFACTURING METHOD AND PHOTOVOLTAIC CELL MANUFACTURING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/123636 [patent_app_country] => US [patent_app_date] => 2009-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6710 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20120015453.pdf [firstpage_image] =>[orig_patent_app_number] => 13123636 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/123636
PHOTOVOLTAIC CELL MANUFACTURING METHOD AND PHOTOVOLTAIC CELL MANUFACTURING APPARATUS Nov 1, 2009 Abandoned
Array ( [id] => 6111728 [patent_doc_number] => 20110189834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'SURFACE TREATMENT FOR MOLECULAR BONDING' [patent_app_type] => utility [patent_app_number] => 13/122717 [patent_app_country] => US [patent_app_date] => 2009-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4382 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20110189834.pdf [firstpage_image] =>[orig_patent_app_number] => 13122717 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/122717
Surface treatment for molecular bonding Oct 26, 2009 Issued
Array ( [id] => 6473891 [patent_doc_number] => 20100041231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'FUSI Integration Method Using SOG as a Sacrificial Planarization Layer' [patent_app_type] => utility [patent_app_number] => 12/603169 [patent_app_country] => US [patent_app_date] => 2009-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5231 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20100041231.pdf [firstpage_image] =>[orig_patent_app_number] => 12603169 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/603169
FUSI integration method using SOG as a sacrificial planarization layer Oct 20, 2009 Issued
Array ( [id] => 9504271 [patent_doc_number] => 08742588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Method for making via interconnection' [patent_app_type] => utility [patent_app_number] => 13/124003 [patent_app_country] => US [patent_app_date] => 2009-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5930 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13124003 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/124003
Method for making via interconnection Oct 14, 2009 Issued
Menu