Search

Pierre E Elisca

Examiner (ID: 9174, Phone: (571)272-6706 , Office: P/3716 )

Most Active Art Unit
3715
Art Unit(s)
3718, 2785, 3714, 3716, 2131, 3621, 2161, 3715
Total Applications
2631
Issued Applications
2140
Pending Applications
221
Abandoned Applications
269

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17599492 [patent_doc_number] => 20220149066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => Memory Array And Method Used In Forming A Memory Array Comprising Strings Of Memory Cells [patent_app_type] => utility [patent_app_number] => 17/091238 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17091238 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/091238
Method used in forming a memory array comprising strings of memory cells and using bridges in sacrificial material in a tier Nov 5, 2020 Issued
Array ( [id] => 16796356 [patent_doc_number] => 20210126173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 17/076331 [patent_app_country] => US [patent_app_date] => 2020-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12311 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17076331 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/076331
ELECTRONIC APPARATUS Oct 20, 2020 Pending
Array ( [id] => 16731132 [patent_doc_number] => 20210098280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => Process for Making a Semiconductor System [patent_app_type] => utility [patent_app_number] => 17/068717 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068717 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/068717
Process for Making a Semiconductor System Oct 11, 2020 Pending
Array ( [id] => 17536617 [patent_doc_number] => 20220115226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => MANUFACTURE METHOD OF A HIGH-RESISTIVITY SILICON HANDLE WAFER FOR A HYBRID SUBSTRATE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/065719 [patent_app_country] => US [patent_app_date] => 2020-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17065719 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/065719
MANUFACTURE METHOD OF A HIGH-RESISTIVITY SILICON HANDLE WAFER FOR A HYBRID SUBSTRATE STRUCTURE Oct 7, 2020 Pending
Array ( [id] => 17486115 [patent_doc_number] => 20220093619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => MEMORY STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/025164 [patent_app_country] => US [patent_app_date] => 2020-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17025164 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/025164
MEMORY STRUCTURE AND METHOD OF MANUFACTURING THE SAME Sep 17, 2020 Pending
Array ( [id] => 16516214 [patent_doc_number] => 20200395472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => POWER SEMICONDUCTOR DEVICE HAVING OVERVOLTAGE PROTECTION AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/005642 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/005642
Power semiconductor device having overvoltage protection and method of manufacturing the same Aug 27, 2020 Issued
Array ( [id] => 19079576 [patent_doc_number] => 11948956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Image sensors including an amorphous region and an electron suppression region [patent_app_type] => utility [patent_app_number] => 16/998202 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8429 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998202 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998202
Image sensors including an amorphous region and an electron suppression region Aug 19, 2020 Issued
Array ( [id] => 17247358 [patent_doc_number] => 20210367103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => MICRO LIGHT EMITTING DIODE [patent_app_type] => utility [patent_app_number] => 16/996925 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996925 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996925
MICRO LIGHT EMITTING DIODE Aug 18, 2020 Abandoned
Array ( [id] => 18447116 [patent_doc_number] => 11682692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Hard mask layer below via structure in display device [patent_app_type] => utility [patent_app_number] => 16/871257 [patent_app_country] => US [patent_app_date] => 2020-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 9891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16871257 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/871257
Hard mask layer below via structure in display device May 10, 2020 Issued
Array ( [id] => 16241616 [patent_doc_number] => 20200258850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => METHOD FOR FABRICATING AN ELECTRONIC DEVICE AND A STACKED ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/862002 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3246 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862002 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/862002
Method for fabricating an electronic device comprising forming an infused adhesive and a periperal ring Apr 28, 2020 Issued
Array ( [id] => 16241695 [patent_doc_number] => 20200258929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => SOLID-STATE IMAGING DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/861580 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16861580 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/861580
SOLID-STATE IMAGING DEVICE AND METHOD OF MANUFACTURING THE SAME Apr 28, 2020 Abandoned
Array ( [id] => 17159193 [patent_doc_number] => 20210320244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => TOP ELECTRODE FOR A MEMORY DEVICE AND METHODS OF MAKING SUCH A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/846497 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16846497 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/846497
Top electrode for a memory device and methods of making such a memory device Apr 12, 2020 Issued
Array ( [id] => 17630702 [patent_doc_number] => 20220165717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => TILED DISPLAY FOR OPTOELECTRONIC SYSTEM [patent_app_type] => utility [patent_app_number] => 17/440883 [patent_app_country] => US [patent_app_date] => 2020-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17440883 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/440883
TILED DISPLAY FOR OPTOELECTRONIC SYSTEM Mar 19, 2020 Pending
Array ( [id] => 19244587 [patent_doc_number] => 12015042 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Structure and material engineering methods for optoelectronic devices signal to noise ratio enhancement [patent_app_type] => utility [patent_app_number] => 16/797807 [patent_app_country] => US [patent_app_date] => 2020-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5435 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16797807 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/797807
Structure and material engineering methods for optoelectronic devices signal to noise ratio enhancement Feb 20, 2020 Issued
Array ( [id] => 17055732 [patent_doc_number] => 20210265166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => VIA-VIA SPACING REDUCTION WITHOUT ADDITIONAL CUT MASK [patent_app_type] => utility [patent_app_number] => 16/795718 [patent_app_country] => US [patent_app_date] => 2020-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795718 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/795718
VIA-VIA SPACING REDUCTION WITHOUT ADDITIONAL CUT MASK Feb 19, 2020 Pending
Array ( [id] => 17714557 [patent_doc_number] => 11378545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Nanofluid sensor with real-time spatial sensing [patent_app_type] => utility [patent_app_number] => 16/794995 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6082 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16794995 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/794995
Nanofluid sensor with real-time spatial sensing Feb 18, 2020 Issued
Array ( [id] => 19229786 [patent_doc_number] => 12009430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Method for gate stack formation and etching [patent_app_type] => utility [patent_app_number] => 16/782680 [patent_app_country] => US [patent_app_date] => 2020-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6154 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16782680 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/782680
Method for gate stack formation and etching Feb 4, 2020 Issued
Array ( [id] => 16194279 [patent_doc_number] => 20200235128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => DISPLAY MODULE AND REPAIRING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 16/749344 [patent_app_country] => US [patent_app_date] => 2020-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16749344 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/749344
DISPLAY MODULE AND REPAIRING METHOD OF THE SAME Jan 21, 2020 Abandoned
Array ( [id] => 16578902 [patent_doc_number] => 20210013303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => STRUCTURE AND METHOD FOR FORMING CAPACITORS FOR A THREE-DIMENSIONAL NAND [patent_app_type] => utility [patent_app_number] => 16/729818 [patent_app_country] => US [patent_app_date] => 2019-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729818 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729818
Structure and method for forming capacitors for a three-dimensional NAND Dec 29, 2019 Issued
Array ( [id] => 16920612 [patent_doc_number] => 20210193704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => METHOD FOR PASSIVATING FULL FRONT-SIDE DEEP TRENCH ISOLATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/725687 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725687 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725687
Method for passivating full front-side deep trench isolation structure Dec 22, 2019 Issued
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